A new processor design based on 3D cache

The interconnection is becoming one of main concerns in current and future microprocessor designs from both performance and consumption. Three-dimensional integration technology, with its capability to shorten the wire length, is a promising method to solve issues related the interconnection. In this paper, we propose a new processor architecture based on 3D cache. We integrate 3D cache with the processor which reduces the global interconnection, power consumption and improves access speed. In addition, we simulate the performance of the 3D processor and 3D cache at different node using 3D Cacti tools. Comparing with 2D, the results show power consumption of the memory system is reduced by about 50%, access time and cycle time of the processor increase 18.57% and 21.41%, respectively.