Through-Silicon Vias: Drivers, Performance, and Innovations

被引：37
|
作者：
Thadesar, Paragkumar A. [1 ]
Gu, Xiaoxiong [2 ]
Alapati, Ramakanth [3 ]
Bakir, Muhannad S. [1 ]
机构：
[1] Georgia Inst Technol, Sch Elect & Comp Engn, Atlanta, GA 30332 USA
[2] IBM Thomas J Watson Res Ctr, Yorktown Hts, NY 10598 USA
[3] GLOBALFOUNDRIES, Santa Clara, CA 95054 USA
来源：
IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY | 2016年 / 6卷 / 07期
关键词：
Loss; low power; photodefinition; polymer stress; through-silicon vias (TSVs); X-RAY MICRODIFFRACTION; END-POINT DETECTION; AIR-GAP; INTERPOSER; DESIGN; FABRICATION; RELIABILITY; TECHNOLOGY; STRESSES; MODEL;
D O I：
10.1109/TCPMT.2016.2524691
中图分类号：
T [工业技术];
学科分类号：
08 ;
摘要：
To address the abating performance improvements from device scaling, innovative 2.5-D and 3-D integrated circuits with vertical interconnects called through-silicon vias (TSVs) have been widely explored. This paper reviews TSVs with focus on the following: 1) key drivers for TSV-based integration; 2) TSV fabrication techniques; 3) TSV electrical and thermomechanical performance fundamentals and characterization techniques; and 4) novel technologies to attain enhanced performance beyond the state-of-the-art TSVs.
引用
收藏
页码：1009 / 1019
页数：11
相关论文
共 50 条
  • [21] An Analytical Capacitance Model for Through-Silicon Vias in Floating Silicon Substrate
    Weerasekera, Roshan
    Katti, Guruprasad
    Dutta, Rahul
    Zhang, Songbai
    Chang, Ka Fai
    Zhou, Jun
    Bhattacharya, Surya
    IEEE TRANSACTIONS ON ELECTRON DEVICES, 2016, 63 (03) : 1182 - 1188
  • [22] Electrical, Optical and Fluidic Through-Silicon Vias for Silicon Interposer Applications
    Parekh, Mahavir S.
    Thadesar, Paragkumar A.
    Bakir, Muhannad S.
    2011 IEEE 61ST ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE (ECTC), 2011, : 1992 - 1998
  • [23] Electrical, optical and fluidic through-silicon vias for silicon interposer applications
    Georgia Institute of Technology, 791 Atlantic Drive, Atlanta, GA 30332, United States
    Proc Electron Compon Technol Conf, 2011, (1992-1998):
  • [24] High-performance built-in self-routing for through-silicon vias
    Huang, Tsung-Chu
    ELECTRONICS LETTERS, 2012, 48 (09) : 480 - 481
  • [25] Experimental Assessment and Analysis of the Influence of Radiation on Through-silicon Vias
    Zeng, Qinghua
    Chen, Jing
    Jin, Yufeng
    2018 IEEE 68TH ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE (ECTC 2018), 2018, : 1164 - 1169
  • [26] Qubit- Compatible Substrates With Superconducting Through-Silicon Vias
    Grigoras, K.
    Yurttagul, N.
    Kaikkonen, J-P
    Mannila, E. T.
    Eskelin, P.
    Lozano, D. P.
    Li, H-X
    Rommel, M.
    Shiri, D.
    Tiencken, N.
    Simbierowicz, S.
    Ronzani, A.
    Hatinen, I
    Datta, D.
    Vesterinen, V.
    Gronberg, L.
    Biznarova, J.
    Roudsari, A. Fadavi
    Kosen, S.
    Osman, A.
    Prunnila, M.
    Hassel, J.
    Bylander, J.
    Govenius, J.
    IEEE TRANSACTIONS ON QUANTUM ENGINEERING, 2022, 3
  • [27] Electroless Grafting of Polymer Insulation Layers in Through-Silicon Vias
    Liu, Yang
    Han, Yutong
    Zhang, Junhong
    He, Junpeng
    Hang, Tao
    Gao, Liming
    Wu, Yunwen
    Li, Ming
    ECS JOURNAL OF SOLID STATE SCIENCE AND TECHNOLOGY, 2019, 8 (10) : P591 - P595
  • [28] A Model for the Free (Top) Surface Deformation of Through-Silicon Vias
    Udupa, Anirudh
    Subbarayan, Ganesh
    Koh, Cheng-kok
    2014 IEEE INTERSOCIETY CONFERENCE ON THERMAL AND THERMOMECHANICAL PHENOMENA IN ELECTRONIC SYSTEMS (ITHERM), 2014, : 616 - 620
  • [29] Influence of Copper Pumping on Integrity and Stress of Through-Silicon Vias
    Su, Fei
    Pan, Xiaoxu
    Huang, Pengfei
    Guan, Yong
    Chen, Jing
    Ma, Shenglin
    IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY, 2016, 6 (08): : 1221 - 1225
  • [30] Alternative insulation liners for through-silicon vias: A comprehensive review
    Tian, Miao
    Gu, Xiaokun
    MATERIALS SCIENCE IN SEMICONDUCTOR PROCESSING, 2023, 166
12345