Fabrication of the SiC Gate-All-Around JFET

Although silicon carbide integrated circuits (SiC ICs) have remarkable heat and radiation tolerances, the lack of performance in transistors is a significant hurdle to their widespread commercialization. A higher transconductance coefficient is one of the key factors for improving transistors' performance. In this study, we have fabricated n-type lateral SiC JFETs with gate-all-around (GAA) structures to maximize their transconductance coefficients. The GAA structure was formed by high-energy Al ion implantation for the bottom layer and tilted one just after SiC gate etching for the side layers on the n-epitaxial layer of 4H-SiC. We obtained the transconductance coefficients 4.89, 3.90, and 3.19 mu A/V2 per channel for gate lengths 2, 3, and 4 mu m, respectively. The maximum terminal gain is 683 at 25 degrees C and about 160 at 250 degrees C-300 degrees C, suggesting that SiC ICs based on GAA JFETs could function well even at high temperatures. The JFETs show little body bias effect, which is also preferable for IC applications.