Impact of encroaching length and taper on double gate tunnel FET performance using TCAD simulations

被引:0
|
作者
Sugi, S.Shinly Swarna [1 ]
Nagarajan, K.K. [2 ]
Srinivasan, R. [1 ]
机构
[1] IT Department, SSN College of Engineering, Chennai, India
[2] MCA Department, SSN College of Engineering, Chennai, India
关键词
10;
D O I
10.1109/ICCPCT.2013.6528880
中图分类号
学科分类号
摘要
引用
收藏
页码:942 / 947
相关论文
共 50 条
  • [21] A double-gate heteromaterial tunnel FET optimized using an evolutionary algorithm
    Choudhury, Sagarika
    Bhowmick, Brinda
    Baishnab, Krishna Lal
    JOURNAL OF COMPUTATIONAL ELECTRONICS, 2020, 19 (01) : 277 - 282
  • [22] Drain Source-Engineered Double-Gate Tunnel FET for Improved Performance
    Kaur, Arashpreet
    Saini, Gaurav
    JOURNAL OF ELECTRONIC MATERIALS, 2024, 53 (07) : 3901 - 3913
  • [23] Study of Process Variations on ft in 30 nm Gate Length FinFET Using TCAD Simulations
    Lakshmi, B.
    Srinivasan, R.
    COMPUTER NETWORKS AND INFORMATION TECHNOLOGIES, 2011, 142 : 482 - 486
  • [24] Performance Enhancement of Novel InAs/Si Hetero Double-Gate Tunnel FET Using Gaussian Doping
    Ahish, Shylendra
    Sharma, Dheeraj
    Kumar, Yernad Balachandra Nithin
    Vasantha, Moodabettu Harishchandra
    IEEE TRANSACTIONS ON ELECTRON DEVICES, 2016, 63 (01) : 288 - 295
  • [25] TCAD Simulations of Dual Gate Dopingless Tunnel Field Effect Transistor with Spacer
    Naik, Eslavath Raja
    Chauhan, Sudakar Singh
    Verma, Gaurav
    2017 2ND IEEE INTERNATIONAL CONFERENCE ON RECENT TRENDS IN ELECTRONICS, INFORMATION & COMMUNICATION TECHNOLOGY (RTEICT), 2017, : 364 - 367
  • [26] Impact of source pocket doping on RF and linearity performance of a cylindrical gate tunnel FET
    Dash, Sidhartha
    Lenka, Annada Shankar
    Jena, Biswajit
    Mishra, Guru Prasad
    INTERNATIONAL JOURNAL OF NUMERICAL MODELLING-ELECTRONIC NETWORKS DEVICES AND FIELDS, 2018, 31 (03)
  • [27] Study of A Heterojunction Double Gate Ferroelectric p-n-i-n Tunnel FET combining analytical modeling and TCAD simulation
    Das, Shib Sankar
    Ghosh, Sudipta
    Sarkar, Subir Kumar
    MICRO AND NANOSTRUCTURES, 2024, 196
  • [28] Impact of carrier concentration and bandgap on the performance of double gate GNR-FET
    Tiwari, Durgesh Laxman
    Sivasankaran, K.
    SUPERLATTICES AND MICROSTRUCTURES, 2019, 130 : 38 - 49
  • [29] Simulation based performance analysis of a double gate work function engineered doped Tunnel FET
    Das, Supratim Subhra
    PROCEEDINGS OF 2018 IEEE INTERNATIONAL CONFERENCE ON ELECTRON DEVICES KOLKATA CONFERENCE (IEEE EDKCON), 2018, : 587 - 590
  • [30] COMPACT MODELS FOR DOUBLE GATE HETERO GATE DIELECTRIC NANO SCALE TUNNEL FET
    Bhowmick, B.
    Baishya, S.
    Joishy, C.
    2013 IEEE INTERNATIONAL CONFERENCE ON SIGNAL PROCESSING, COMPUTING AND CONTROL (ISPCC), 2013,