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- [41] An accurate drain current model for symmetric dual gate tunnel FET using effective tunneling length Nanoscience and Nanotechnology - Asia, 2019, 9 (01): : 85 - 91
- [42] Performance Evaluation of Double Gate Pentacene Organic FET Using Simulation Study PROCEEDINGS OF 2ND INTERNATIONAL CONFERENCE ON VLSI DEVICE, CIRCUIT AND SYSTEM (IEEE VLSI DCS 2020), 2020, : 393 - 396
- [43] Performance Investigation of Cylindrical Double Gate Junctionless FET 2018 5TH IEEE UTTAR PRADESH SECTION INTERNATIONAL CONFERENCE ON ELECTRICAL, ELECTRONICS AND COMPUTER ENGINEERING (UPCON), 2018, : 1210 - 1214
- [44] Reduced Gate Capacitance of Dual Metal Double Gate over Single Metal Double Gate Tunnel FET: A Comparative Study 2018 CONFERENCE ON EMERGING DEVICES AND SMART SYSTEMS (ICEDSS), 2018, : 110 - 112
- [45] Reconfigurable FET-Based SRAM and Its Single Event Upset Performance Analysis Using TCAD Simulations MICROELECTRONICS JOURNAL, 2020, 101
- [46] Double Gate Tunnel FET with ultrathin silicon body and high-K gate dielectric ESSDERC 2006: PROCEEDINGS OF THE 36TH EUROPEAN SOLID-STATE DEVICE RESEARCH CONFERENCE, 2006, : 383 - +
- [47] TCAD Simulation Study of Source and Gate Material-Engineered Double Gate Tunnel Field Effect Transistor 2021 IEEE 3RD PHD COLLOQUIUM ON ETHICALLY DRIVEN INNOVATION AND TECHNOLOGY FOR SOCIETY (PHD EDITS), 2021,
- [50] Steep subthreshold swing Double - Gate tunnel FET using source pocket engineering: Design guidelines MICRO AND NANOSTRUCTURES, 2024, 195