共 50 条
- [1] A 28nm 64Kb SRAM based Inference-Training Tri-Mode Computing-in-Memory Macro 2022 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS 22), 2022, : 2561 - 2565
- [3] A 28nm 16kb Aggregation and Combination Computing-in-Memory Macro with Dual-level Sparsity Modulation and Sparse-Tracking ADCs for GCNs 2024 IEEE CUSTOM INTEGRATED CIRCUITS CONFERENCE, CICC, 2024,
- [4] 15.5 A 28nm 64Kb 6T SRAM Computing-in-Memory Macro with 8b MAC Operation for AI Edge Chips 2020 IEEE INTERNATIONAL SOLID- STATE CIRCUITS CONFERENCE (ISSCC), 2020, : 246 - +
- [5] SP-IMC: A Sparsity Aware In-Memory-Computing Macro in 28nm CMOS with Configurable Sparse Representation for Highly Sparse DNN Workloads 2024 IEEE CUSTOM INTEGRATED CIRCUITS CONFERENCE, CICC, 2024,
- [7] FP-IMC: A 28nm All-Digital Configurable Floating-Point In-Memory Computing Macro IEEE 49TH EUROPEAN SOLID STATE CIRCUITS CONFERENCE, ESSCIRC 2023, 2023, : 405 - 408
- [8] SLEEP TRANSISTOR DESIGN IN 28NM CMOS TECHNOLOGY 2013 IEEE 26TH INTERNATIONAL SOC CONFERENCE (SOCC), 2013, : 278 - 283
- [9] A Novel Compact CBCM Method for High Resolution Measurement in 28nm CMOS Technology 2012 IEEE INTERNATIONAL CONFERENCE ON MICROELECTRONIC TEST STRUCTURES (ICMTS), 2012, : 119 - 121
- [10] Integration of SPAD in 28nm FDSOI CMOS technology 2018 48TH EUROPEAN SOLID-STATE DEVICE RESEARCH CONFERENCE (ESSDERC), 2018, : 82 - 85