PROCESSING AND CHARACTERIZATION OF A PBT DEVICE USING SELF-ALIGNED COSI2

被引:1
|
作者
HATZIKONSTANTINIDOU, S [1 ]
NILSSON, HE [1 ]
FROJDH, C [1 ]
PETERSSON, CS [1 ]
KAPLAN, W [1 ]
机构
[1] IND MICROELECTR CTR,S-16421 KISTA,SWEDEN
关键词
D O I
10.1088/0268-1242/9/12/019
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
We report the fabrication of an etched-groove permeable base transistor (PBT) test structure on silicon, using self-aligned CoSi2 for the base and emitter contacts. This process is fully compatible with a standard CMOS process. The structure has been characterized and simulated. The simulation results are compared with the measured characteristics of the fabricated device.
引用
收藏
页码:2272 / 2277
页数:6
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