共 50 条
- [2] VLSI architectures for computing exponentiations, multiplicative inverses, and divisions in GF(2(m)) IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-ANALOG AND DIGITAL SIGNAL PROCESSING, 1997, 44 (10): : 847 - 855
- [4] VLSI architectures of divider for finite field GF(2m) ISCAS '98 - PROCEEDINGS OF THE 1998 INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-6, 1998, : A482 - A485
- [9] A low latency architecture for computing multiplicative inverses and divisions in GF(2m) 2000 CANADIAN CONFERENCE ON ELECTRICAL AND COMPUTER ENGINEERING, CONFERENCE PROCEEDINGS, VOLS 1 AND 2: NAVIGATING TO A NEW ERA, 2000, : 43 - 47
- [10] An efficient algorithm for computing inverses in GF(2m) using dual bases COMPUTATIONAL SCIENCE - ICCS 2003, PT IV, PROCEEDINGS, 2003, 2660 : 994 - 999