A 14-bit 130-MHZ cmos current-steering DAC with adjustable INL

被引：15

作者：

Chen, T ^{[1
]}

Geens, P ^{[1
]}

Van der Plas, G ^{[1
]}

Dehaene, W ^{[1
]}

Gielen, G ^{[1
]}

机构：

[1] Katholieke Univ Leuven, ESAT, MICAS, B-3001 Heverlee, Belgium

来源：

ESSCIRC 2004: PROCEEDINGS OF THE 30TH EUROPEAN SOLID-STATE CIRCUITS CONFERENCE | 2004年

关键词：

D O I：

10.1109/ESSCIR.2004.1356644

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

In this paper, a 14-bit, 130-MHz CMOS current-steering DAC is presented. Different from traditional intrinsic-accuracy DACs, its INL can be improved by dynamic adjustment, which allows to reduce the chip area significantly. The layout has been carefully designed so that the signal lines of the current sources have the same length, thus good synchronization among the current sources can be achieved. The measured DNL and INL is 0.45 LSB and 0.7 LSB respectively. The SFDR is 82 dB at a 1 MHz signal frequency and 130 MHz sampling frequency. The DAC has been implemented in a standard IP5M 0.25-mum CMOS technology. The area of the current source block is 1 mm(2), and the whole core area is only 3.5 mm(2).

引用

页码：167 / 170

页数：4

共 50 条

[31] Design of a 8 Bit Current-Steering DAC for a GSM Transmitter
Marin, Mihai-Eugen
Brinzei, Catalin
Constantinescu, Florin
Gheorghe, Alexandru
Ursac, Iulian
2014 INTERNATIONAL SYMPOSIUM ON FUNDAMENTALS OF ELECTRICAL ENGINEERING (ISFEE), 2014,
[32] A 10-bit Current-steering Fibonacci DAC with DEM
Nazvanov, Artem A.
Yenuchenko, Mikhail S.
PROCEEDINGS OF THE 2019 IEEE CONFERENCE OF RUSSIAN YOUNG RESEARCHERS IN ELECTRICAL AND ELECTRONIC ENGINEERING (EICONRUS), 2019, : 780 - 783
[33] Low-power 14-bit current steering DAC, for ADSL2+/CO applications in 0.13μm CMOS
Giotta, D
Pessl, P
Clara, M
Klatzer, W
Gaggl, R
ESSCIRC 2004: PROCEEDINGS OF THE 30TH EUROPEAN SOLID-STATE CIRCUITS CONFERENCE, 2004, : 163 - 166
[34] A Low Power 6-bit Current-steering DAC in 0.18-μm CMOS Process
Chakir, Mostafa
Akhamal, Hicham
Qjidaa, Hassan
2015 INTELLIGENT SYSTEMS AND COMPUTER VISION (ISCV), 2015,
[35] A Behavior model based on Verilog-A for 14 bits 200MHz Current-steering DAC
Dai, Lan
Fu, Zhi-bo
2012 INTERNATIONAL CONFERENCE ON CONTROL ENGINEERING AND COMMUNICATION TECHNOLOGY (ICCECT 2012), 2012, : 451 - 454
[36] A 12-bit current-steering DAC with calibration by combination selection
Virtanen, Kati
Maunu, Janne
Poikonen, Jonne
Paasio, Ari
2007 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-11, 2007, : 1469 - 1472
[37] A programmable 6 bit DAC of current-steering dedicated to nerve stimulator
Rekik, N.
S'Habou, S.
Benhamida, A.
Samet, M.
2008 INTERNATIONAL CONFERENCE ON DESIGN & TECHNOLOGY OF INTEGRATED SYSTEMS IN NANOSCALE, 2008, : 289 - 293
[38] A 10-bit 100-MHz Current-Steering DAC with Randomized Thermometer Code Calibration Scheme
Chen, Hsin-Liang
Hsieh, Ming-Han
Chiang, Jen-Shiun
2019 INTERNATIONAL SYMPOSIUM ON INTELLIGENT SIGNAL PROCESSING AND COMMUNICATION SYSTEMS (ISPACS), 2019,
[39] A 14-bit 320MSPS segmented current-steering D/A converter for high-speed applications
Liang Shangquan
Gao Minglun
Yin Yongsheng
Deng Honghui
DELTA 2008: FOURTH IEEE INTERNATIONAL SYMPOSIUM ON ELECTRONIC DESIGN, TEST AND APPLICATIONS, PROCEEDINGS, 2008, : 111 - 114
[40] A Novel 12-bit Current-Steering DAC with Two Reference Currents
Chou, Fang-Ting
Chen, Zong-Yi
Chu, Hsing-Chien
Hung, Chung-Chih
2015 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), 2015, : 1022 - 1025

← 1 2 3 4 5 →