共 50 条
- [31] FinFET Device Circuit Co-Design: Issues and Challenges 2015 28TH INTERNATIONAL CONFERENCE ON VLSI DESIGN (VLSID), 2015, : 12 - 13
- [32] FinFET Device Circuit Co-design Issues: Impact of Circuit Parameters on Delay 2016 29TH INTERNATIONAL CONFERENCE ON VLSI DESIGN AND 2016 15TH INTERNATIONAL CONFERENCE ON EMBEDDED SYSTEMS (VLSID), 2016, : 288 - 293
- [35] Orthogonal drawings of graphs for the automation of VLSI circuit design J Comput Sci Technol, 5 (447-459):
- [36] Hierarchical BSG floorplan for hierarchical VLSI circuit design ELECTRONICS AND COMMUNICATIONS IN JAPAN PART III-FUNDAMENTAL ELECTRONIC SCIENCE, 2002, 85 (03): : 12 - 21
- [37] Testable VLSI circuit design of SIMD graphics engine TENTH ANNUAL IEEE INTERNATIONAL ASIC CONFERENCE AND EXHIBIT, PROCEEDINGS, 1997, : 74 - 78