Modeling of Grain Growth in the Polysilicon Channel Process of a Vertical NAND Flash Memory

We present a phase-field model to simulate grain growth occurring in the polysilicon channel process, one of critical steps in fabricating a vertical NAND flash memory. The process is called solid-phase crystallization, that is, annealing following depositing an amorphous silicon film on a side wall of a channel hole. Prediction of grain structures and grain size is of great importance to process engineers because grain boundaries degrade the bit-line current flowing along the channel. A set of Allen-Cahn equations for a polycrystalline film were numerically solved by finite difference method using a parallel computing platform. Our model could successfully reproduce experimental trends on film thickness dependence of the final grain size.