Forksheet FETs with Bottom Dielectric Isolation, Self-Aligned Gate Cut, and Isolation between Adjacent Source-Drain Structures

被引：13

作者：

Mertens, H. ^{[1
]}

Ritzenthaler, R. ^{[1
]}

Oniki, Y. ^{[1
]}

Gowda, P. Puttarame ^{[1
]}

Mannaert, G. ^{[1
]}

Sebaai, F. ^{[1
]}

Hikavyy, A. ^{[1
]}

Rosseel, E. ^{[1
]}

Dupuy, E. ^{[1
]}

Peter, A. ^{[1
]}

Vandersmissen, K. ^{[1
]}

Radisic, D. ^{[1
]}

Briggs, B. ^{[1
]}

Batuk, D. ^{[1
]}

Geypen, J. ^{[1
]}

Martinez-Alanis, G. ^{[1
]}

Seidel, F. ^{[1
]}

Richard, O. ^{[1
]}

Chan, B. T. ^{[1
]}

Mitard, J. ^{[1
]}

Litta, E. Dentoni ^{[1
]}

Horiguchi, N. ^{[1
]}

机构：

[1] IMEC, Leuven, Belgium

来源：

2022 INTERNATIONAL ELECTRON DEVICES MEETING, IEDM | 2022年

关键词：

D O I：

10.1109/IEDM45625.2022.10019497

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

We report on forksheet field-effect transistors that are isolated from the substrate by bottom dielectric isolation (BDI) formed by replacing a SiGe epitaxial layer with a dielectric film while the devices are anchored to the substrate by forksheet walls. Functional unipolar forksheet devices with BDI are demonstrated for both N- and PMOS, for wall widths down to 10 nm. In addition, we describe a scheme to isolate adjacent source-drain structures by the forksheet dielectric wall. This scheme relies on increasing wall height, by means of active area patterning hard mask engineering, to compensate for wall losses in downstream process modules. Finally, self-alignment of gate cut to active is demonstrated morphologically.

引用

页数：4

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