Compact analytical threshold-voltage model of nanoscale fully depleted strained-Si on silicon-germanium-on-insulator (SGOI) MOSFETs

被引：52
|
作者：
Venkataraman, Vivek
Nawal, Susheel
Kumar, M. Jagadesh
机构：
[1] Indian Institute of Technology, New Delhi 110 016, Hauz Khas
来源：
IEEE TRANSACTIONS ON ELECTRON DEVICES | 2007年 / 54卷 / 03期
关键词：
nanoscale; short-channel effects; silicon-germanium-on-insulator (SGOI); simulation; strain; strained-SOI MOSFET; threshold voltage; 2-D modeling;
D O I：
10.1109/TED.2006.890369
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
In this paper, a physically based analytical threshold-voltage model is developed for nanoscale strained-Si on silicon-germanium-on-insulator MOSFETs for the first time, taking into account short-channel effects. The model is derived by solving the 2-D Poisson equation in strained-Si and SiGe layers. The effects of various important device parameters like strain (Ge mole fraction in the SiGe layer), body doping, gate workfunction, strained-Si thin film and SiGe layer thickness, etc., has been considered. We have demonstrated that increasing strain in order to enhance device performance can lead to undesirable threshold-voltage rolloff. The model is found to agree well with the 2-D simulation results.
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页码：554 / 562
页数：9
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