Three-State Quantum Dot Gate FETs Using ZnS-ZnMgS Lattice-Matched Gate Insulator on Silicon

被引：25
|
作者：
Karmakar, Supriya [1 ]
Suarez, Ernesto [1 ]
Jain, Faquir C. [1 ]
机构：
[1] Univ Connecticut, Dept Elect & Comp Engn, Storrs, CT 06269 USA
来源：
JOURNAL OF ELECTRONIC MATERIALS | 2011年 / 40卷 / 08期
关键词：
Quantum dot gate FET; three-state FET; II-VI insulator; lattice-matched gate insulator; NEGATIVE DIFFERENTIAL RESISTANCE; RESONANT-TUNNELING TRANSISTOR; PERFORMANCE; FABRICATION; CIRCUITS; MODFET; HEMT; WELL;
D O I：
10.1007/s11664-011-1676-z
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
This paper presents the three-state behavior of quantum dot gate field-effect transistors (FETs). GeO (x) -cladded Ge quantum dots (QDs) are site-specifically self-assembled over lattice-matched ZnS-ZnMgS high-kappa gate insulator layers grown by metalorganic chemical vapor deposition (MOCVD) on silicon substrates. A model of three-state behavior manifested in the transfer characteristics due to the quantum dot gate is also presented. The model is based on the transfer of carriers from the inversion channel to two layers of cladded GeO (x) -Ge quantum dots.
引用
收藏
页码：1749 / 1756
页数：8
相关论文
共 41 条
  • [1] Three-State Quantum Dot Gate FETs Using ZnS-ZnMgS Lattice-Matched Gate Insulator on Silicon
    Supriya Karmakar
    Ernesto Suarez
    Faquir C. Jain
    Journal of Electronic Materials, 2011, 40 : 1749 - 1756
  • [2] ZnS-ZnMgS-ZnS Lattice-Matched Gate Insulator as an Alternative for Silicon Dioxide on Silicon in Quantum Dot Gate FETs (QDGFETs)
    Supriya Karmakar
    Ernesto Suarez
    Mukesh Gogna
    Faquir Jain
    Journal of Electronic Materials, 2012, 41 : 2663 - 2670
  • [3] ZnS-ZnMgS-ZnS Lattice-Matched Gate Insulator as an Alternative for Silicon Dioxide on Silicon in Quantum Dot Gate FETs (QDGFETs)
    Karmakar, Supriya
    Suarez, Ernesto
    Gogna, Mukesh
    Jain, Faquir
    JOURNAL OF ELECTRONIC MATERIALS, 2012, 41 (10) : 2663 - 2670
  • [4] Novel Multistate Quantum Dot Gate FETs Using SiO2 and Lattice-Matched ZnS-ZnMgS-ZnS as Gate Insulators
    Lingalugari, M.
    Baskar, K.
    Chan, P. -Y.
    Dufilie, P.
    Suarez, E.
    Chandy, J.
    Heller, E.
    Jain, F. C.
    JOURNAL OF ELECTRONIC MATERIALS, 2013, 42 (11) : 3156 - 3163
  • [5] Novel Multistate Quantum Dot Gate FETs Using SiO2 and Lattice-Matched ZnS-ZnMgS-ZnS as Gate Insulators
    M. Lingalugari
    K. Baskar
    P.-Y. Chan
    P. Dufilie
    E. Suarez
    J. Chandy
    E. Heller
    F. C. Jain
    Journal of Electronic Materials, 2013, 42 : 3156 - 3163
  • [6] Quantum Dot Gate Three-State and Nonvolatile Memory Field-Effect Transistors Using a ZnS/ZnMgS/ZnS Heteroepitaxial Stack as a Tunnel Insulator on Silicon-on-Insulator Substrates
    Suarez, Ernesto
    Chan, Pik-Yiu
    Lingalugari, Murali
    Ayers, John E.
    Heller, Evan
    Jain, Faquir
    JOURNAL OF ELECTRONIC MATERIALS, 2013, 42 (11) : 3275 - 3282
  • [7] Quantum Dot Gate Three-State and Nonvolatile Memory Field-Effect Transistors Using a ZnS/ZnMgS/ZnS Heteroepitaxial Stack as a Tunnel Insulator on Silicon-on-Insulator Substrates
    Ernesto Suarez
    Pik-Yiu Chan
    Murali Lingalugari
    John E. Ayers
    Evan Heller
    Faquir Jain
    Journal of Electronic Materials, 2013, 42 : 3275 - 3282
  • [8] Novel Quantum Dot Gate FETs and Nonvolatile Memories Using Lattice-Matched II–VI Gate Insulators
    F. C. Jain
    E. Suarez
    M. Gogna
    F. Alamoody
    D. Butkiewicus
    R. Hohner
    T. Liaskas
    S. Karmakar
    P.-Y. Chan
    B. Miller
    J. Chandy
    E. Heller
    Journal of Electronic Materials, 2009, 38 : 1574 - 1578
  • [9] Novel Quantum Dot Gate FETs and Nonvolatile Memories Using Lattice-Matched II-VI Gate Insulators
    Jain, F. C.
    Suarez, E.
    Gogna, M.
    Alamoody, F.
    Butkiewicus, D.
    Hohner, R.
    Liaskas, T.
    Karmakar, S.
    Chan, P. -Y.
    Miller, B.
    Chandy, J.
    Heller, E.
    JOURNAL OF ELECTRONIC MATERIALS, 2009, 38 (08) : 1574 - 1578
  • [10] Three-state quantum dot gate field-effect transistor in silicon-on-insulator
    Karmakar, Supriya
    Gogna, Mukesh
    Suarez, Ernesto
    Jain, Faquir C.
    IET CIRCUITS DEVICES & SYSTEMS, 2015, 9 (02) : 111 - 118
12345