Three-State Quantum Dot Gate FETs Using ZnS-ZnMgS Lattice-Matched Gate Insulator on Silicon

被引：25

作者：

Karmakar, Supriya ^{[1
]}

Suarez, Ernesto ^{[1
]}

Jain, Faquir C. ^{[1
]}

机构：

[1] Univ Connecticut, Dept Elect & Comp Engn, Storrs, CT 06269 USA

来源：

JOURNAL OF ELECTRONIC MATERIALS | 2011年 / 40卷 / 08期

关键词：

Quantum dot gate FET; three-state FET; II-VI insulator; lattice-matched gate insulator; NEGATIVE DIFFERENTIAL RESISTANCE; RESONANT-TUNNELING TRANSISTOR; PERFORMANCE; FABRICATION; CIRCUITS; MODFET; HEMT; WELL;

D O I：

10.1007/s11664-011-1676-z

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This paper presents the three-state behavior of quantum dot gate field-effect transistors (FETs). GeO (x) -cladded Ge quantum dots (QDs) are site-specifically self-assembled over lattice-matched ZnS-ZnMgS high-kappa gate insulator layers grown by metalorganic chemical vapor deposition (MOCVD) on silicon substrates. A model of three-state behavior manifested in the transfer characteristics due to the quantum dot gate is also presented. The model is based on the transfer of carriers from the inversion channel to two layers of cladded GeO (x) -Ge quantum dots.

引用

页码：1749 / 1756

页数：8