Novel Multistate Quantum Dot Gate FETs Using SiO2 and Lattice-Matched ZnS-ZnMgS-ZnS as Gate Insulators

被引:4
|
作者
Lingalugari, M. [1 ]
Baskar, K. [1 ]
Chan, P. -Y. [1 ]
Dufilie, P. [1 ]
Suarez, E. [1 ]
Chandy, J. [1 ]
Heller, E. [2 ]
Jain, F. C. [1 ]
机构
[1] Univ Connecticut, Storrs, CT 06269 USA
[2] Synopsys Inc, Ossining, NY 10562 USA
关键词
Quantum dot gate FETs; II-VI barrier layers; high-kappa dielectric layers; lattice-matched gate insulators; multistate FETs;
D O I
10.1007/s11664-013-2696-7
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Multistate behavior has been achieved in quantum dot gate field-effect transistor (QDGFET) configurations using either SiO (x) -cladded Si or GeO (x) -cladded Ge quantum dots (QDs) with asymmetric dot sizes. An alternative method is to use both SiO (x) -cladded Si and GeO (x) -cladded Ge QDs in QDGFETs. In this paper, we present experimental verification of four-state behavior observed in a QDGFET with cladded Si and Ge dots site-specifically self-assembled in the gate region over a thin SiO2 tunnel layer on a Si substrate. This paper also investigates the use of lattice-matched high-kappa ZnS-ZnMgS-ZnS layers as a gate insulator in mixed-dot Si QDGFETs. Quantum-mechanical simulation of the transfer characteristic (I (D)-V (G)) shows four-state behavior with two intermediate states between the conventional ON and OFF states.
引用
收藏
页码:3156 / 3163
页数:8
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