Litho enhancements for 45nm-node MuGFETs

被引:0
|
作者
Verhaegen, S [1 ]
Ercken, M [1 ]
Nackaerts, A [1 ]
Vandenberghe, G [1 ]
机构
[1] IMEC, B-3001 Heverlee, Belgium
来源
MICROLITHOGRAPHY WORLD | 2005年 / 14卷 / 03期
关键词
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
引用
收藏
页码:14 / 17
页数:4
相关论文
共 50 条
  • [1] Annealing techniques for optimizing 45nm-node USJs
    J.O.B Technologies, Aieo, HI
    不详
    不详
    不详
    不详
    不详
    不详
    Solid State Technol, 2006, 5 (47-54):
  • [2] Dual damascene formation for 45nm-node and beyond
    Maekawa, K
    Nagai, H
    Iwashita, M
    Muramatsu, M
    Kubota, K
    Hinata, K
    Kokubo, T
    Shiota, A
    Hattori, M
    Nagano, H
    Tokushige, K
    Kodera, M
    Mishima, K
    Advanced Metallization Conference 2005 (AMC 2005), 2006, : 103 - 108
  • [3] Annealing techniques for optimizing 45nm-node USJs']Js
    Borland, John
    Mineji, Akira
    Krull, Wade
    Tanjyo, Masayasu
    Hillard, Robert
    Walker, Tom
    SOLID STATE TECHNOLOGY, 2006, 49 (05) : 47 - +
  • [4] Optical performance enhancement technique for 45nm-node with binary mask
    Jung, Jin-Sik
    Kim, Hee-Bom
    Lee, Jeung-Woo
    Choi, Sung-Woon
    Han, Woo-Sung
    OPTICAL MICROLITHOGRAPHY XX, PTS 1-3, 2007, 6520
  • [5] Impact of MSD and Mask Manufacture Errors on 45nm-node Lithography
    Han, Chunying
    Li, Yanqiu
    Liu, Lihui
    Guo, Xuejia
    Wang, Xuxia
    Yang, Jianhong
    6TH INTERNATIONAL SYMPOSIUM ON ADVANCED OPTICAL MANUFACTURING AND TESTING TECHNOLOGIES: DESIGN, MANUFACTURING, AND TESTING OF SMART STRUCTURES, MICRO- AND NANO- OPTICAL DEVICES, AND SYSTEMS, 2012, 8418
  • [6] Image-blur tolerances for 65nm and 45nm-node IC manufacturing
    Lalovic, I
    Kroyan, A
    Kye, J
    Liu, HY
    Levinson, HJ
    OPTICAL MICROLITHOGRAPHY XVI, PTS 1-3, 2003, 5040 : 1570 - 1580
  • [7] Litho metrology challenges for the 45nm technology node and beyond
    Allgair, John A.
    Bunday, Benjamin D.
    Bishop, Mike
    Lipscomb, Pete
    Orji, Ndubuisi G.
    METROLOGY, INSPECTION, AND PROCESS CONTROL FOR MICROLITHOGRAPHY XX, PTS 1 AND 2, 2006, 6152
  • [8] Multi-layer resist system for 45nm-node and beyond (I)
    Hashimoto, M.
    Shiratori, H.
    Horii, K.
    Yokoya, Y.
    Ohkubo, Y.
    Takamizawa, H.
    Fujimura, Y.
    Morimoto, J.
    Manoshiro, A.
    Shimizu, M.
    Yokoyama, T.
    Enomoto, T.
    Nagai, M.
    PHOTOMASK TECHNOLOGY 2006, PTS 1 AND 2, 2006, 6349
  • [9] Multi-layer resist system for 45nm-node and beyond (III)
    Abe, Yuuki
    Morimoto, Jumpei
    Yokoyama, Toshifumi
    Kominato, Atsushi
    Ohkubo, Yasushi
    PHOTOMASK TECHNOLOGY 2006, PTS 1 AND 2, 2006, 6349
  • [10] Direct plating of cu on ALD TaN for 45nm-node cu BEOL metallization
    Shih, CH
    Su, HW
    Lin, CJ
    Ko, T
    Chen, CH
    Huang, JJ
    Chou, SW
    Peng, CH
    Hsieh, CH
    Tsai, MH
    Shue, WS
    Yu, CH
    Liang, MS
    IEEE INTERNATIONAL ELECTRON DEVICES MEETING 2004, TECHNICAL DIGEST, 2004, : 337 - 340