Physics-based compact model of transient leakage current caused by parasitic bipolar junction transistor in gate-all-around MOSFETs Foreword

被引:0
|
作者
Yi, Boram [1 ]
Park, Yeong-Hun [1 ]
Yang, Ji-Woon [1 ]
机构
[1] Korea Univ, Dept Elect & Informat Engn, Sejong 30019, South Korea
关键词
Compact model; Transient leakage current; GAA MOSFETs; Parasitic BJT; SOI;
D O I
10.1016/j.sse.2019.107739
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In this study, transient leakage current caused by a parasitic bipolar junction transistor (BJT) in nanowire-type gate-all-around metal-oxide-semiconductor field-effect transistors is physically modeled for circuit design. The model considers the majority carrier concentration in the body, which is modulated by the gate-to-body bias. The parasitic BJT gain is dependent on the majority carrier concentration, which exceeds the body doping concentration in transient conditions. Three-dimensional technology computer-aided design simulation is performed to verify the model. The model accurately predicts the transient leakage current according to various structural parameters.
引用
收藏
页数:5
相关论文
共 46 条
  • [1] Physics Based Current and Capacitance Model of Short-Channel Double Gate and Gate-All-Around MOSFETs
    Borli, H.
    Kolberg, S.
    Fjeldly, T. A.
    2008 2ND IEEE INTERNATIONAL NANOELECTRONICS CONFERENCE, VOLS 1-3, 2008, : 493 - 498
  • [2] Tunneling Leakage Current of Gate-All-Around Nanowire Junctionless Transistor with an Auxiliary Gate
    Zhao, Linyuan
    Chen, Wenjie
    Liang, Renrong
    Liu, Yu
    Xu, Jun
    2019 IEEE INTERNATIONAL CONFERENCE ON ELECTRON DEVICES AND SOLID-STATE CIRCUITS (EDSSC), 2019,
  • [3] Bias dependent physics-based model of low-frequency noise for nanowire type gate-all-around MOSFETs
    Yi, Boram
    Yang, Geun Soo
    Barraud, Sylvain
    Bervard, Laurent
    Lee, Jae Woo
    Yang, Ji-Woon
    SOLID-STATE ELECTRONICS, 2022, 189
  • [4] A compact drain current model of short-channel cylindrical gate-all-around MOSFETs
    Tsormpatzoglou, A.
    Tassis, D. H.
    Dimitriadis, C. A.
    Ghibaudo, G.
    Pananakakis, G.
    Clerc, R.
    SEMICONDUCTOR SCIENCE AND TECHNOLOGY, 2009, 24 (07)
  • [5] Comment on 'A compact drain current model of short-channel cylindrical gate-all-around MOSFETs'
    Jha, Shankaranand
    Kumar, Subindu
    SEMICONDUCTOR SCIENCE AND TECHNOLOGY, 2014, 29 (03)
  • [6] Physics-Based Compact Model of Parasitic Bipolar Transistor for Single-Event Transients in FinFETs
    Yi, Boram
    Lee, Boung Jun
    Oh, Jin-Hwan
    Kim, Ji-Seon
    Kim, Jun-Hyeok
    Yang, Ji-Woon
    IEEE TRANSACTIONS ON NUCLEAR SCIENCE, 2018, 65 (03) : 866 - 870
  • [7] Physics-based drain current modeling of gate-all-around junctionless nanowire twin-gate transistor (JN-TGT) for digital applications
    Yogesh Pratap
    Rajni Gautam
    Subhasis Haldar
    R. S. Gupta
    Mridula Gupta
    Journal of Computational Electronics, 2016, 15 : 492 - 501
  • [8] Physics-based drain current modeling of gate-all-around junctionless nanowire twin-gate transistor (JN-TGT) for digital applications
    Pratap, Yogesh
    Gautam, Rajni
    Haldar, Subhasis
    Gupta, R. S.
    Gupta, Mridula
    JOURNAL OF COMPUTATIONAL ELECTRONICS, 2016, 15 (02) : 492 - 501
  • [9] High-frequency compact analytical noise model of gate-all-around MOSFETs
    Lazaro, A.
    Nae, B.
    Muthupandian, C.
    Iniguez, B.
    SEMICONDUCTOR SCIENCE AND TECHNOLOGY, 2010, 25 (03)
  • [10] A compact explicit DC model for short channel Gate-All-Around junctionless MOSFETs
    Lime, Francois
    Avila-Herrera, Fernando
    Cerdeira, Antonio
    Iniguez, Benjamin
    SOLID-STATE ELECTRONICS, 2017, 131 : 24 - 29