VLSI design of turbo decoder for integrated communication system-on-chip applications

被引：0
|
作者：
Fang, WC [1 ]
Sethuram, A [1 ]
Belevi, K [1 ]
机构：
[1] CALTECH, Jet Prop Lab, Pasadena, CA 91109 USA
来源：
PROCEEDINGS OF THE 2003 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL II: COMMUNICATIONS-MULTIMEDIA SYSTEMS & APPLICATIONS | 2003年
关键词：
D O I：
暂无
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
A high-throughput low-power turbo decoder core has been developed for integrated communication system applications such as Digital Video Broadcast (DVB), satellite communications, wireless LAN, digital TV, cable modem, and xDSL systems. The turbo decoder is based on convolutional constituent codes, which outperform all other Forward Error Correction techniques. This turbo decoder core is parameterizable and can be modified easily to fit any size for advanced communication. system-on-chip products. The turbo decoder core provides Forward Error Correction of up to 15 Mbits/sec on a 0.13-micron CMOS FPGA prototyping chip at a power of 0.1 watt.
引用
收藏
页码：117 / 120
页数：4
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