Study of Temperature Effect on Analog/RF and Linearity Performance of Dual Material Gate (DMG) Vertical Super-Thin Body (VSTB) FET

This work presents a simulation study of the influence of temperature on the performance of dual material gate (DMG) vertical super-thin body (VSTB) FET. The introduction of DMG causes a drop in the off-state current (I-off) by similar to 99.18% and DIBL by 20%. Drop in the I-off enhances the on-to-off current ratio (I-on/I-off) by similar to 98.85%. A rigorous investigation on temperature dependency of DC, analog/RF, and linearity metrics was carried out. The zero temperature coefficient (ZTC) bias point for the DMG device was observed to be nearly at a gate bias of V-G = 0.41 V. Various DC figures of merit (FoM) such as subthreshold swing (SS), I-on/I-off, and threshold voltage (V-T) show improvement with temperature fall. Lowering in temperature also leads to enhanced analog/RF performance by offering superior g(m), g(d), C-gg, C-gd, maximum f(T), maximum GBP, intrinsic delay, TGF, TFP, GFP, and GTFP. However, linearity metrics like g(m2), g(m3), VIP2, VIP3, IIP3, IMD3, and 1-dB compression point show better performance with an increase in temperature.