Low-energy inference machine with multilevel HfO2 RRAM arrays

被引:5
|
作者
Milo, V. [1 ]
Zambelli, C. [2 ]
Olivo, P. [2 ]
Perez, E. [3 ]
Ossorio, O. G. [4 ]
Wenger, Ch. [3 ,5 ]
Ielmini, D. [1 ]
机构
[1] Politecn Milan, Dipartimento Elettron Informa & Bioingn, I-20133 Milan, Italy
[2] Univ Ferrara, Dipartimento Ingn, I-44121 Ferrara, Italy
[3] IHPLeibniz Inst Innovat Mikroelekt, Technol Pk 25, D-15236 Frankfurt, Germany
[4] Univ Valladolid, Dept Elect & Elect, Paseo Belen 15, Valladolid 47011, Spain
[5] Brandenburg Med Sch Theodor, Fehrbelliner Str 38, D-16816 Neuruppin, Germany
基金
欧洲研究理事会;
关键词
resistive switching memory (RRAM); artificial intelligence; machine learning; in-memory computing; neural network; backpropagation; energy efficiency;
D O I
10.1109/essderc.2019.8901818
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Recently, artificial intelligence reached impressive milestones in many machine learning tasks such as the recognition of faces, objects, and speech. These achievements have been mostly demonstrated in software running on high-performance computers, such as the graphics processing unit (GPU) or the tensor processing unit (TPU). Novel hardware with inmemory processing is however more promising in view of the reduced latency and the improved energy efficiency. In this scenario, emerging memory technologies such as phase change memory (PCM) and resistive switching memory (RRAM), have been proposed for hardware accelerators of both learning and inference tasks. In this work, a multilevel 4kbit RRAM array is used to implement a 2-layer feedforward neural network trained with the MNIST dataset. The performance of the network in the inference mode is compared with recently proposed implementations using the same image dataset demonstrating the higher energy efficiency of our hardware, thanks to low current operation and an innovative multilevel programming scheme. These results support RRAM technology for in-memory hardware accelerators of machine learning.
引用
收藏
页码:174 / 177
页数:4
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