Crosstalk- and performance-driven multilevel full-chip routing

被引:33
|
作者
Ho, TY [1 ]
Chang, YW
Chen, SJ
Lee, DT
机构
[1] Natl Taiwan Univ, Dept Elect Engn, Taipei 106, Taiwan
[2] Natl Taiwan Univ, Grad Inst Elect Engn, Taipei 106, Taiwan
[3] IBM Corp, Thomas J Watson Res Ctr, Yorktown Hts, NY 10598 USA
[4] Natl Taiwan Univ, Dept Comp Sci & Informat Engn, Taipei 106, Taiwan
[5] Acad Sinica, Inst Informat Sci, Taipei 115, Taiwan
关键词
detailed routing; global routing; layout; noise optimization; physical design; routing; timing optimization;
D O I
10.1109/TCAD.2005.847902
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
In this paper, we propose a novel framework for fast multilevel routing considering crosstalk and performance optimization. To handle the crosstalk minimization problem, we incorporate an intermediate stage of layer/track assignment into the multilevel routing framework. For performance-driven routing, we propose a novel minimum-radius minimum-cost spanning tree heuristic for global routing. Compared with the state-of-the-art multilevel routing with the routability mode, the experimental results show that our router achieved a 6.7X runtime speedup, reduced the respective maximum and average crosstalk (coupling length) by about 30% and 24%, reduced the respective maximum and average delay by about 15% and 5%. Compared with the timing-driven mode, the experimental results show that our router still achieved a 5.9X runtime speedup, reduced the respective maximum and average crosstalk by about 35% and 23%, reduced the respective maximum and average delay by about 7% and 10% in comparable routability, and resulted in fewer failed nets.
引用
收藏
页码:869 / 878
页数:10
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