An embedded MOS model 9 for CMOS RF circuit design

被引:0
|
作者
Iversen, CR [1 ]
机构
[1] Siemens Mobile Phones AS, Pandrup, Denmark
关键词
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This article presents an n-channel MOS transistor model for the simulation of CMOS RF circuits in the gigahertz range. This model is based on a MOS model 9 (MM9) compact transistor model, embedded in a network describing device parasitics, The parasitics network consists of six resistors, five capacitors and two JUNCAP diode models. Methods for device characterization and determination Of the parasitics are presented. A model, developed for a 0.25 mum CAMS technology, shows good accuracy in the measured frequency range tip to 12 GHz and over a wide bias range. By applying simple rules for the scaling of parasitics and a unit transistor layout approach, the model also shows excellent scalability with respect to device width. It also predicts intermodulation products with fair accuracy.
引用
收藏
页码:22 / +
页数:8
相关论文
共 50 条
  • [21] Enhanced analytic noise model for RF CMOS design
    Koeppe, J
    Harjani, R
    PROCEEDINGS OF THE IEEE 2004 CUSTOM INTEGRATED CIRCUITS CONFERENCE, 2004, : 383 - 386
  • [22] 5.5GHz LSNA mosfet modeling for RF CMOS circuit design
    Grabinski, W
    Vandamme, EP
    Schreurs, D
    Maeder, H
    Pilloud, O
    Mcandrew, CC
    ARFTG: AUTOMATIC RF TECHNIQUES GROUP, CONFERENCE DIGEST, FALL 2002: MEASUREMENTS NEEDS FOR EMERGING TECHNOLOGIES, 2002, : 39 - 47
  • [23] RF and Millimeter-wave Circuit Design in CMOS: Basics and Recent Advances
    Krishnaswamy, Harish
    2013 26TH INTERNATIONAL CONFERENCE ON VLSI DESIGN AND 2013 12TH INTERNATIONAL CONFERENCE ON EMBEDDED SYSTEMS (VLSID), 2013, : XLI - XLI
  • [24] A derived physically expressive circuit model for multilayer RF embedded passives
    Wang, Jie
    Wu, Ke-Li
    IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, 2006, 54 (05) : 1961 - 1968
  • [25] Design of tunable CMOS up-conversion mixer for RF integrated circuit
    Ramiah, H
    Zulkifli, TZA
    TENCON 2004 - 2004 IEEE REGION 10 CONFERENCE, VOLS A-D, PROCEEDINGS: ANALOG AND DIGITAL TECHNIQUES IN ELECTRICAL ENGINEERING, 2004, : D352 - D355
  • [26] Design tool solutions for mixed-signal/RF circuit design in CMOS nanometer technologies
    Gielen, Georges G. E.
    PROCEEDINGS OF THE ASP-DAC 2007, 2007, : 432 - 437
  • [27] Constrained Low-Power CMOS Analog Circuit Design via All-Inversion Region MOS Model
    Goswami, Magnanil
    Kundu, Sudakshina
    2014 IEEE Fourth International Conference on Consumer Electronics Berlin (ICCE-Berlin), 2014, : 277 - 278
  • [28] Validation and parameter extraction of a compact equivalent circuit model for an RF CMOS transistor
    Junaid Ahmed Uqaili
    Rabnawaz Sarmad Uqaili
    Saleemullah Memon
    Kamlesh Kumar Soothar
    Kamran Ali Memon
    Muhammad Furqan Haider
    Journal of Computational Electronics, 2020, 19 : 1471 - 1477
  • [29] Validation and parameter extraction of a compact equivalent circuit model for an RF CMOS transistor
    Uqaili, Junaid Ahmed
    Uqaili, Rabnawaz Sarmad
    Memon, Saleemullah
    Soothar, Kamlesh Kumar
    Memon, Kamran Ali
    Haider, Muhammad Furqan
    JOURNAL OF COMPUTATIONAL ELECTRONICS, 2020, 19 (04) : 1471 - 1477
  • [30] Noise modeling for RF CMOS circuit simulation
    Scholten, AJ
    Tiemeijer, LF
    van Langevelde, R
    Havens, RJ
    Zegers-van Duijnhoven, ATA
    Venezia, VC
    IEEE TRANSACTIONS ON ELECTRON DEVICES, 2003, 50 (03) : 618 - 632