Differential Evolution Based Design of Multiplier-less FIR Filter using Canonical Signed Digit Representation

被引:0
|
作者
Chandra, Abhijit [1 ]
Chattopadhyay, Sudipta [2 ]
机构
[1] Bengal Engn & Sci Univ, Dept Elect & Telecommun Engn, Sibpur 711103, Howrah, India
[2] Jadavpur Univ, Dept Elect & Telecommun Engn, Kolkata 700032, India
关键词
Canonical Signed Digit (CSD); Differential Evolution (DE); Field Programmable Gate Array (FPGA) chip; Finite Impulse Response (FIR) filter; multiplier-less filters;
D O I
暂无
中图分类号
TP18 [人工智能理论];
学科分类号
081104 ; 0812 ; 0835 ; 1405 ;
摘要
Design of hardware efficient Finite duration Impulse Response (FIR) filter has drawn considerable attention amongst the researchers of late because of a number of striking features. Useful application of various intelligent optimization techniques has added special flavour to it. In this communication, we have incorporated a canonical signed digit (CSD) representation for the coefficients of multiplier-less low-pass FIR filter which have been optimized by means of a robust evolutionary computation mechanism, namely Differential Evolution (DE). As a matter of fact, each of the tap coefficients has been formulated as sums and/ or differences of powers of two. Design examples have proved the hardware efficiency of this CSD-based architecture as compared to conventional binary representation. Robustness of our approach has been substantiated by comparing its performance with a variety of state-of-the-art multiplier-less FIR filters from literature.
引用
收藏
页码:425 / 428
页数:4
相关论文
共 50 条
  • [41] Efficient squaring circuit using canonical signed-digit number representation
    Tanaka, Yuuki
    Wei, Shugang
    IEICE ELECTRONICS EXPRESS, 2014, 11 (02):
  • [42] Vlsi architecture for low power minimum signed digit multiplier for fir filter and its signal processing applications
    Vijeyakumar, K.N.
    Sumathy, V.
    Aishwarya, E.J.
    Saravanakumar, S.
    Devi, M. Gayathri
    Journal of Theoretical and Applied Information Technology, 2012, 42 (01) : 50 - 58
  • [43] Digital filter synthesis based on minimal signed digit representation.
    Park, IC
    Kang, HJ
    38TH DESIGN AUTOMATION CONFERENCE PROCEEDINGS 2001, 2001, : 468 - 473
  • [44] A low-power FIR filter using combined residue and radix-2 signed-digit representation
    Lindahl, A
    Bengtsson, L
    DSD 2005: 8TH EUROMICRO CONFERENCE ON DIGITAL SYSTEM DESIGN, PROCEEDINGS, 2005, : 42 - 47
  • [45] Metaheuristic algorithms for the design of multiplier-less non-uniform filter banks based on frequency response masking
    T. S. Bindiya
    Elizabeth Elias
    Soft Computing, 2014, 18 : 1529 - 1547
  • [46] Design of canonical signed digit IIR filters using genetic algorithm
    Liang, L
    Ahmadi, M
    Sid-Ahmed, M
    Wallus, K
    CONFERENCE RECORD OF THE THIRTY-SEVENTH ASILOMAR CONFERENCE ON SIGNALS, SYSTEMS & COMPUTERS, VOLS 1 AND 2, 2003, : 2043 - 2047
  • [47] Factorization of M-channel FIR and IIR cosine-modulated filter banks and their multiplier-less realizations using SOPOT coefficients
    Chan, S
    Mao, J
    Yiu, P
    Ho, K
    2001 IEEE INTERNATIONAL CONFERENCE ON ACOUSTICS, SPEECH, AND SIGNAL PROCESSING, VOLS I-VI, PROCEEDINGS: VOL I: SPEECH PROCESSING 1; VOL II: SPEECH PROCESSING 2 IND TECHNOL TRACK DESIGN & IMPLEMENTATION OF SIGNAL PROCESSING SYSTEMS NEURALNETWORKS FOR SIGNAL PROCESSING; VOL III: IMAGE & MULTIDIMENSIONAL SIGNAL PROCESSING MULTIMEDIA SIGNAL PROCESSING - VOL IV: SIGNAL PROCESSING FOR COMMUNICATIONS; VOL V: SIGNAL PROCESSING EDUCATION SENSOR ARRAY & MULTICHANNEL SIGNAL PROCESSING AUDIO & ELECTROACOUSTICS; VOL VI: SIGNAL PROCESSING THEORY & METHODS STUDENT FORUM, 2001, : 4043 - 4043
  • [48] Low Complexity Multiplier-less Modified FRM Filter Bank using MPGBP Algorithm
    Parvathi, A. K.
    Sakthivel, V.
    INTERNATIONAL JOURNAL OF ELECTRONICS AND TELECOMMUNICATIONS, 2022, 68 (04) : 831 - 840
  • [49] Metaheuristic algorithms for the design of multiplier-less non-uniform filter banks based on frequency response masking
    Bindiya, T. S.
    Elias, Elizabeth
    SOFT COMPUTING, 2014, 18 (08) : 1529 - 1547
  • [50] The factorization of M-channel FIR and IIR cosine-modulated filter banks and their multiplier-less realizations using SOPOT coefficients
    Chan, SC
    Mao, JS
    Yiu, PM
    Ho, KL
    2004 47TH MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL II, CONFERENCE PROCEEDINGS, 2004, : 109 - 112