A Subthreshold MOSFET Voltage Reference Based on Current Mirror Technology Under 55 nm CMOS Process

被引：6

作者：

Ning, Ning ^{[1
]}

Zhao, Siyuan ^{[1
]}

Wu, Kejun ^{[1
]}

Wu, Shuangyi ^{[1
]}

Liu, Taizhong ^{[1
]}

Han, Junming ^{[1
]}

Li, Liang ^{[1
]}

机构：

[1] Univ Elect Sci & Technol China, State Key Lab Elect Thin Films & Integrated Devic, Chengdu 610054, Peoples R China

来源：

NANOSCIENCE AND NANOTECHNOLOGY LETTERS | 2014年 / 6卷 / 02期

关键词：

Subthreshold MOSFET; Current Mirror Technology; 55 nm CMOS Process; Second-Order Temperature Compensation; BANDGAP;

D O I：

10.1166/nnl.2014.1734

中图分类号：

TB3 [工程材料学];

学科分类号：

0805 ; 080502 ;

摘要：

Based on current mirror technology, a subthreshold MOSFET voltage reference with second-order temperature compensation is designed. The reference generator utilizes gate-source voltage difference (Delta V-gs) between two NMOS transistors, which both operate in subthreshold region to achieve second-order temperature compensation. By using current mirror technology, Delta V-gs that is complementary to absolute temperature is added to the output of the voltage reference. Simulation results show that a temperature coefficient of 5.9 ppm/degrees C at 1.2 V is achieved from -55 degrees C to 160 degrees C. The reference generator operates under supply voltage ranging from 1.1 V to 1.5 V with current lower than 8.6 mu A.

引用

页码：128 / 133

页数：6

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