共 50 条
- [32] Removal of redundancy in combinational circuits under classification of undetectable faults Systems and Computers in Japan, 1993, 24 (07): : 31 - 40
- [33] On Clustering of Undetectable Transition Faults in Standard-Scan Circuits 2011 IEEE 29TH VLSI TEST SYMPOSIUM (VTS), 2011, : 128 - 133
- [34] A new approach for initialization sequences computation for synchronous sequential circuits INTERNATIONAL CONFERENCE ON COMPUTER DESIGN - VLSI IN COMPUTERS AND PROCESSORS, PROCEEDINGS, 1997, : 381 - 386
- [35] On reducing the target fault list of crosstalk-induced delay faults in synchronous sequential circuits INTERNATIONAL TEST CONFERENCE 2001, PROCEEDINGS, 2001, : 568 - 577
- [37] Double-single stuck-at faults: A delay fault model for synchronous sequential circuits IEEE Trans Comput Aided Des Integr Circuits Syst, 2009, 1 (426-432):
- [38] Procedures for static compaction of test sequences for synchronous sequential circuits based on vector restoration DESIGN, AUTOMATION AND TEST IN EUROPE, PROCEEDINGS, 1998, : 583 - 587
- [39] Analyzing the redundant faults in ISCAS 85 benchmark circuits Jisuanji Yanjiu yu Fazhan/Computer Research and Development, 2001, 38 (12):
- [40] On undetectable faults in partial scan circuits using transparent-scan IEEE INTERNATIONAL CONFERENCE ON COMPUTER DESIGN: VLSI IN COMPUTERS & PROCESSORS, PROCEEDINGS, 2004, : 82 - 84