FAST VLSI MULTIPLIER FOR GF(2M ).

被引：0
|
作者：
Scott, P.Andrew [1 ]
Tavares, Stafford E. [1 ]
Peppard, Lloyd E. [1 ]
机构：
[1] Queen's Univ, Kingston, Ont, Can, Queen's Univ, Kingston, Ont, Can
来源：
IEEE Journal on Selected Areas in Communications | 1984年 / SAC-4卷 / 01期
关键词：
D O I：
暂无
中图分类号：
学科分类号：
摘要：
9
引用
收藏
页码：62 / 66
相关论文
共 50 条
  • [21] VLSI ARCHITECTURES FOR COMPUTING MULTIPLICATIONS AND INVERSES IN GF (2M)
    WANG, CC
    TRUONG, TK
    SHAO, HM
    DEUTSCH, LJ
    OMURA, JK
    REED, IS
    IEEE TRANSACTIONS ON COMPUTERS, 1985, 34 (08) : 709 - 717
  • [22] VLSI ARCHITECTURES FOR COMPUTING MULTIPLICATIONS AND INVERSES IN GF(2M).
    Wang, Charles C.
    Truong, T.K.
    Shao, Howard M.
    Deutsch, Leslie J.
    Omura, Jim K.
    Reed, Irving S.
    IEEE Transactions on Computers, 1985, C-34 (08) : 709 - 717
  • [23] A Unified VLSI Architecture for Addition and Multiplication in GF(2m)
    Andronic, C.
    Chiper, D. F.
    2015 INTERNATIONAL SYMPOSIUM ON SIGNALS, CIRCUITS AND SYSTEMS (ISSCS), 2015,
  • [24] A scalable and unified multiplier architecture for finite fields GF(p) and GF(2m)
    Savas, E
    Tenca, AF
    Koç, ÇK
    CRYPTOGRAPHIC HARDWARE AND EMBEDDED SYSTEMS-CHES 2000, PROCEEDINGS, 2001, 1965 : 277 - 292
  • [25] An efficient reconfigurable multiplier architecture for Galois field GF(2m)
    Kitsos, P
    Theodoridis, G
    Koufopavlou, O
    MICROELECTRONICS JOURNAL, 2003, 34 (10) : 975 - 980
  • [26] Efficient Digit Serial Dual Basis GF(2m) Multiplier
    Chang, Po-Lun
    Hsieh, Fei-Hu
    Chen, Liang-Hwa
    Lee, Chiou-Yng
    ICIEA 2010: PROCEEDINGS OF THE 5TH IEEE CONFERENCE ON INDUSTRIAL ELECTRONICS AND APPLICATIONS, VOL 1, 2010, : 180 - +
  • [27] SCALABLE AND SYSTOLIC DUAL BASIS MULTIPLIER OVER GF(2m)
    Chen, Liang-Hwa
    Chang, Po-Lun
    Lee, Chiou-Yng
    Yang, Ying-Kuei
    INTERNATIONAL JOURNAL OF INNOVATIVE COMPUTING INFORMATION AND CONTROL, 2011, 7 (03): : 1193 - 1208
  • [28] Hybrid multiplier for GF(2m) defined by some irreducible trinomials
    Choi, YJ
    Chang, KY
    Hong, DW
    Cho, HS
    ELECTRONICS LETTERS, 2004, 40 (14) : 852 - 853
  • [29] Semi-systolic modular multiplier over GF(2m)
    Kim, Hyun-Sung
    Lee, Sung-Woon
    COMPUTATIONAL SCIENCE AND ITS APPLICATIONS - ICCSA 2008, PT 2, PROCEEDINGS, 2008, 5073 : 836 - +
  • [30] A digit-serial multiplier for finite field GF(2m)
    Kim, CH
    Hong, CP
    Kwon, S
    IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2005, 13 (04) : 476 - 483
12345