共 50 条
- [41] Analysis of test application time for test data compression methods based on compression codes JOURNAL OF ELECTRONIC TESTING-THEORY AND APPLICATIONS, 2004, 20 (02): : 199 - 212
- [44] Low-Power Test in Compression-Based Reconfigurable Scan Architectures SBCCI 2010: 23RD SYMPOSIUM ON INTEGRATED CIRCUITS AND SYSTEMS DESIGN, PROCEEDINGS, 2010, : 55 - 60
- [45] Low-power test in compression-based reconfigurable scan architectures KUWAIT JOURNAL OF SCIENCE & ENGINEERING, 2011, 38 (2B): : 175 - 195
- [47] Optimal scan tree construction with test vector modification for test compression ATS 2003: 12TH ASIAN TEST SYMPOSIUM, PROCEEDINGS, 2003, : 136 - 141
- [48] A New Scan Architecture for Both Low Power Testing and Test Volume Compression Under SOC Test Environment Journal of Electronic Testing, 2008, 24 : 365 - 378
- [49] A new scan architecture for both low power testing and test volume compression under SOC test environment JOURNAL OF ELECTRONIC TESTING-THEORY AND APPLICATIONS, 2008, 24 (04): : 365 - 378
- [50] Test Compression for Circuits with Multiple Scan Chains 2015 16TH LATIN-AMERICAN TEST SYMPOSIUM (LATS), 2015,