Design and implementation of 1-D and 2-D mixed architecture FFT processor in heterogeneous multi-core SoC based on FPGA

被引：0
|
作者：
Zhang, Duo-li [1 ]
Huang, Lu [1 ]
Song, Yu-kun [1 ]
Du, Gao-ming [1 ]
机构：
[1] Institute of VLSI Design Hefei University of Technology, Hefei 230009, China
来源：
International Journal of Control and Automation | 2014年 / 7卷 / 06期
关键词：
Memory architecture - Programmable logic controllers - Pipeline processing systems - System-on-chip - Field programmable gate arrays (FPGA) - Random access storage - Digital arithmetic;
D O I：
10.14257/ijca.2014.7.6.18
中图分类号：
学科分类号：
摘要：
引用
收藏
页码：177 / 188
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