Design and implementation of a RSA modular exponentiator

The rapid advance in communication technology brings a request for cryptoprocessors of higher performance. In the design of the RSA modular exponentiator, the Montgomery modular multiplication algorithm and the right-to-left binary method are used and modified considering large-bit modular multiplication and VLSI implementation. A Carry Save Adder structure is used in the modular multiplier, to avoid the long carry propagation. We propose a Signal Multi-Backup strategy to resolve the problem of large loads that are caused by the signal broadcasting of large-bit operation structures.