Design and implementation of a RSA modular exponentiator

被引:0
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作者
Liu, Qiang [1 ,2 ]
Tong, Dong [1 ,2 ]
Cheng, Xu [1 ,2 ]
机构
[1] Microprocessor Research and Development Center, Beijing 100871, China
[2] Department of Computer Science and Technology, Peking University, Beijing 100871, China
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关键词
Algorithms - Binary codes - Broadcasting - Communication - Design - Signal processing - VLSI circuits;
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摘要
The rapid advance in communication technology brings a request for cryptoprocessors of higher performance. In the design of the RSA modular exponentiator, the Montgomery modular multiplication algorithm and the right-to-left binary method are used and modified considering large-bit modular multiplication and VLSI implementation. A Carry Save Adder structure is used in the modular multiplier, to avoid the long carry propagation. We propose a Signal Multi-Backup strategy to resolve the problem of large loads that are caused by the signal broadcasting of large-bit operation structures.
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页码:923 / 927
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