共 50 条
- [21] Gate electrode engineering by control of grain growth for high performance and high reliable 0.18 mu m dual gate CMOS 1997 SYMPOSIUM ON VLSI TECHNOLOGY: DIGEST OF TECHNICAL PAPERS, 1997, : 107 - 108
- [28] A 0.1-mu m double-deck-shaped gate HJFET with reduced gate-fringing-capacitance for ultra-high-speed ICs GAAS IC SYMPOSIUM - 19TH ANNUAL, TECHNICAL DIGEST 1997, 1997, : 70 - 73
- [29] High performance 0.2 mu m CMOS with 25 angstrom gate oxide grown on nitrogen implanted Si substrates IEDM - INTERNATIONAL ELECTRON DEVICES MEETING, TECHNICAL DIGEST 1996, 1996, : 499 - 502