ANALYZING MULTIPLE FAULTS IN SYNCHRONOUS SEQUENTIAL-CIRCUITS BY BOOLEAN DIFFERENCE TECHNIQUES

被引:0
|
作者
DAS, SR
NAYAK, AR
NGUYEN, T
机构
[1] Department of Electrical Engineering, University of Ottawa, Ottawa, ON
[2] Department of Systems and Computer Engineering, Carleton University, Ottawa, ON
[3] Department of Electrical Engineering, University of Ottawa, Ottawa, ON
关键词
D O I
10.1080/01969729008902253
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
The Boolean difference is a mathematical concept that has proved its usefulness in the study of single and multiple “stuck-at" faults in combinational circuits. Goldstein has extended his tool of analysis to cover the multiple stuck-at faults Asynchronous sequential circuits. In this paper, modifications to Goldstein's paper are presented, together with a new method for deriving the required shortest test sequence to detect a specified multiple fault. © 1990 Taylor & Francis Group, LLC.
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收藏
页码:461 / 474
页数:14
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