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- [2] Wordlength optimization of a pipelined FFT processor 42ND MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS, PROCEEDINGS, VOLS 1 AND 2, 1999, : 501 - 503
- [3] Low Power Pipelined FFT Processor Architecture on FPGA 2018 9TH IEEE CONTROL AND SYSTEM GRADUATE RESEARCH COLLOQUIUM (ICSGRC2018), 2018, : 31 - 34
- [4] The GPS code acquisition based on pipelined FFT processor SECOND INTERNATIONAL CONFERENCE ON SPACE INFORMATION TECHNOLOGY, PTS 1-3, 2007, 6795
- [5] A PIPELINED FFT PROCESSOR FOR WORD-SEQUENTIAL DATA IEEE TRANSACTIONS ON ACOUSTICS SPEECH AND SIGNAL PROCESSING, 1989, 37 (12): : 1982 - 1985
- [7] A genetic algorithm for the optimisation of a reconfigurable pipelined FFT processor 2004 NASA/DOD CONFERENCE ON EVOLVABLE HARDWARE, PROCEEDINGS, 2004, : 104 - 108
- [8] FPGA implementation of Radix-22 Pipelined FFT Processor SIGNAL PROCESSING SYSTEMS, 2009, : 109 - +
- [9] An FPGA-Based Implementation of a Pipelined FFT Processor for High-Speed Signal Processing Applications APPLIED RECONFIGURABLE COMPUTING, 2017, 10216 : 81 - 89
- [10] Twiddle Factor Transformation for Pipelined FFT Processing 2007 IEEE INTERNATIONAL CONFERENCE ON COMPUTER DESIGN, VOLS, 1 AND 2, 2007, : 1 - 6