SPARE J-K FLIP-FLOP AS 2 INPUT NAND GATE

被引：0
|
作者：
DASGUPTA, KS [1 ]
KUMAR, KMC [1 ]
机构：
[1] TATA INST FUNDAMENTAL RES,BOMBAY,INDIA
来源：
ELECTRONIC ENGINEERING | 1974年 / 46卷 / 561期
关键词：
D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
引用
收藏
页码：21 / 21
页数：1
相关论文
共 50 条
  • [41] A multiple-input single-phase clock flip-flop family
    Hobson, RF
    Dyck, AR
    NINTH GREAT LAKES SYMPOSIUM ON VLSI, PROCEEDINGS, 1999, : 240 - 241
  • [42] MATHEMATICAL FOUNDATIONS OF INTERCONNECTED J-K FLIP-FLOPS
    PLESS, V
    NOTICES OF THE AMERICAN MATHEMATICAL SOCIETY, 1975, 22 (01): : A40 - A40
  • [43] Implementation of J-K and J-K master-slave flip-flops with nonlinear material in all-optical domain
    Sahu, Samir
    Dhar, Shantanu
    OPTICAL ENGINEERING, 2009, 48 (07)
  • [44] Engineered Gate-Based Nanoscaled JK Flip-Flop: Design, Simulation and Applications
    Chadha, Dev
    Khan, Anam
    Alkhammash, Hend I.
    Loan, Sajad A.
    NANO, 2024,
  • [45] Dual edge-triggered flip-flop with modified NAND keeper for high-performance VLSI
    Kim, JI
    Kong, BS
    CURRENT APPLIED PHYSICS, 2004, 4 (01) : 49 - 53
  • [46] Double Gate FinFET Master Slave Flip-Flop Design for Low Power Application
    Gupta, Ankur Kumar
    Akashe, Shyam
    2014 INTERNATIONAL CONFERENCE ON POWER, CONTROL AND EMBEDDED SYSTEMS (ICPCES), 2014,
  • [47] 2 ICS FORM 4-STATE FLIP-FLOP
    BANYAY, P
    EDN MAGAZINE-ELECTRICAL DESIGN NEWS, 1984, 29 (01): : 290 - 290
  • [48] A 130 nm radiation hardened flip-flop with an annular gate and a C-element
    Wang Lei
    Jiang Jianhua
    Xiang Yiming
    Zhou Yumei
    JOURNAL OF SEMICONDUCTORS, 2014, 35 (01)
  • [49] I2L JK FLIP-FLOP CIRCUITS
    PIGUET, C
    DIGITAL PROCESSES, 1978, 4 (02): : 171 - 175
  • [50] DESIGNING SEQUENTIAL SYSTEMS WITH FUZZY J-K FLIP-FLOPS
    HIROTA, K
    PEDRYCZ, W
    FUZZY SETS AND SYSTEMS, 1991, 39 (03) : 261 - 278
12345