RESEARCH IN DESIGN AUTOMATION FOR VLSI LAYOUT

被引：1

作者：

KOZAWA, T

TERAI, H

机构：

[1] Hitachi Central Research Lab, Tokyo, Jpn, Hitachi Central Research Lab, Tokyo, Jpn

来源：

IEEE DESIGN & TEST OF COMPUTERS | 1985年 / 2卷 / 05期

关键词：

D O I：

10.1109/MDT.1985.294816

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

INTEGRATED CIRCUITS, VLSI

引用

页码：43 / 53

页数：11

共 50 条

[21] ESD PROTECTION - DESIGN AND LAYOUT ISSUES FOR VLSI CIRCUITS
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