SUPPRESSION OF BORON PENETRATION IN P+ POLYSILICON GATE P-MOSFETS USING LOW-TEMPERATURE GATE-OXIDE N2O ANNEAL

被引：74

作者：

MA, ZJ ^{[1
]}

CHEN, JC ^{[1
]}

LIU, ZH ^{[1
]}

KRICK, JT ^{[1
]}

CHENG, YC ^{[1
]}

HU, C ^{[1
]}

KO, PK ^{[1
]}

机构：

[1] CITY POLYTECH HONG KONG,HONG KONG,HONG KONG

来源：

IEEE ELECTRON DEVICE LETTERS | 1994年 / 15卷 / 03期

关键词：

D O I：

10.1109/55.285386

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

It has been reported that high-temperature (similar to 1100 degrees C) N2O-annealed oxide can block boron penetration from poly-Si gates to the silicon substrate. However, this high-temperature step may be inappropriate for the low thermal budgets required of deep-submicron ULSI MOSFET's. In this study, we show that low-temperature (900 similar to 950 degrees C) N2O-annealed gate oxide is also a good barrier to boron penetration. For the first time, the change in channel doping profile due to compensation of arsenic and boron ionized impurities was resolved using MOS C-V measurement techniques. It was found that the higher the nitrogen concentration incorporated at Si/SiO2 interface, the more effective is the suppression of boron penetration. The experimental results also suggest that, for 60 similar to 110 Angstrom gate oxides, a certain amount of nitrogen (similar to 2.2%) incorporated near the Si/SiO2 interface is essential to effectively prevent boron diffusing into the underlying silicon substrate.

引用

页码：109 / 111

页数：3

共 50 条

[41] Enhancement of inversion channel mobility in 4H-SiC MOSFETs using a gate oxide grown in nitrous oxide (N2O)
Gudjónsson, G
Olafsson, HO
Sveinbjörnsson, EO
SILICON CARBIDE AND RELATED MATERIALS 2003, PTS 1 AND 2, 2004, 457-460 : 1425 - 1428
[42] Increase of parasitic resistance of p-MOSFETs due to nitrogen atoms incorporation into silicon substrate by N2O-oxynitride gate dielectrics process
Takayanagi-Takagi, M
Yoshimura, H
Toyoshima, Y
INTERNATIONAL ELECTRON DEVICES MEETING - 1997, TECHNICAL DIGEST, 1997, : 235 - 238
[43] Impact of Charge Trapping Effect on Negative Bias Temperature Instability in P-MOSFETs with HfO2/SiON Gate Stack
Chen, Shih-Chang
Chien, Chao-Hsin
Lou, Jen-Chung
PROCEEDINGS OF THE 17TH INTERNATIONAL VACUUM CONGRESS/13TH INTERNATIONAL CONFERENCE ON SURFACE SCIENCE/INTERNATIONAL CONFERENCE ON NANOSCIENCE AND TECHNOLOGY, 2008, 100
[44] Noise in p-channel SiGe and Si MOSFETs with gate oxide grown by low temperature plasma anodisation
Lukyanchikova, NB
Petrichuk, MV
Garbar, NP
Riley, LS
Hall, S
EDMO 2001: INTERNATIONAL SYMPOSIUM ON ELECTRON DEVICES FOR MICROWAVE AND OPTOELECTRONIC APPLICATIONS, 2001, : 181 - 186
[45] Suppression of boron penetration for p+ stacked poly-Si gates by using inductively coupled N2 plasma treatment
Cheng, HC
Lai, WK
Hwang, CC
Juang, MH
Chu, SC
Liu, TF
IEEE ELECTRON DEVICE LETTERS, 1999, 20 (10) : 535 - 537
[46] Suppression of boron penetration for p+ stacked poly-Si gates by using inductively coupled N2 plasma treatment
Dept. of Electronics Engineering, Institute of Electronics, National Chiao Tung University, Hsinchu 300, Taiwan
不详
不详
IEEE Electron Device Lett, 10 (535-537):
[47] Aggressively scaled P-channel mosfets with stacked nitride-oxide-nitride, N/O/N, gate dielectrics
Wu, YD
Lucovsky, G
ULTRATHIN SIO2 AND HIGH-K MATERIALS FOR ULSI GATE DIELECTRICS, 1999, 567 : 101 - 106
[48] Improvement of low-temperature gate dielectric formed in N2O plasma by an additional CF4 pretreatment process
Chang, TY
Lei, TF
Chao, TS
Wen, HC
Chen, HW
IEEE ELECTRON DEVICE LETTERS, 2002, 23 (07) : 389 - 391
[49] A PHYSICAL MODEL FOR BORON PENETRATION THROUGH AN OXYNITRIDE GATE DIELECTRIC PREPARED BY RAPID THERMAL-PROCESSING IN N2O
HWANG, HS
TING, WC
KWONG, DL
LEE, J
APPLIED PHYSICS LETTERS, 1991, 59 (13) : 1581 - 1582
[50] ELECTRICAL CHARACTERISTICS OF RAPID THERMAL NITRIDED-OXIDE GATE N-MOSFETS AND P-MOSFETS WITH LESS-THAN 1 ATOM-PERCENT NITROGEN CONCENTRATION
MOMOSE, HS
MORIMOTO, T
OZAWA, Y
YAMABE, K
IWAI, H
IEEE TRANSACTIONS ON ELECTRON DEVICES, 1994, 41 (04) : 546 - 552

← 1 2 3 4 5 →