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- [31] Effect of Material Properties and Bump Parameters on Capillary Filling in Through-Silicon-Via Underfill Dispensing 2018 20TH INTERNATIONAL CONFERENCE ON ELECTRONIC MATERIALS AND PACKAGING (EMAP), 2018,
- [34] Through-Silicon Via Filling Process Using Pulse Reversal Plating 2009 INTERNATIONAL CONFERENCE ON ELECTRONIC PACKAGING TECHNOLOGY & HIGH DENSITY PACKAGING (ICEPT-HDP 2009), 2009, : 15 - +
- [35] Copper Filling Process for Small Diameter, High Aspect Ratio Through Silicon Via (TSV) 2012 13TH INTERNATIONAL CONFERENCE ON ELECTRONIC PACKAGING TECHNOLOGY & HIGH DENSITY PACKAGING (ICEPT-HDP 2012), 2012, : 482 - 486
- [37] Parametric Study, Modeling of Etching Process and Application for Tapered Through-Silicon-Via 2012 13TH INTERNATIONAL CONFERENCE ON ELECTRONIC PACKAGING TECHNOLOGY & HIGH DENSITY PACKAGING (ICEPT-HDP 2012), 2012, : 476 - 481
- [39] Characteristic of Through Silicon Via's Seed Layer Deposition and Via Filling KOREAN JOURNAL OF MATERIALS RESEARCH, 2013, 23 (10): : 550 - 554
- [40] Simulation of Copper Electroplating Fill Process with Different Parameters for Through Silicon Via 2015 16TH INTERNATIONAL CONFERENCE ON ELECTRONIC PACKAGING TECHNOLOGY, 2015,