Review of FinFET Devices and Perspective on Circuit Design Challenges

被引：0
|
作者：
Ravindra Kumar Maurya
Brinda Bhowmick
机构：
[1] NIT Silchar,Department of Electronics and Communication Engineering
来源：
Silicon | 2022年 / 14卷
关键词：
Short Channel Effects (SCE); Patterning and shape of Fin; Design of SRAM and circuit challenges; FinFET domino circuits;
D O I：
暂无
中图分类号：
学科分类号：
摘要：
In recent technology, the demand for 3D multiple-gate MOSFETs such as FinFETs increase. In this paper, FinFETs are explored and reviewed. The scaling of planar MOSFET below 32nm technology increases the short channel effects (SCE). To improve the concert in low-power VLSI logic circuits and reduced the SCEs, we need enhanced gate controlling over the channel by using multigate technology. Here, we have discussed numerous architecture of FINFET, the threshold voltage (Vth) and supply voltage (Vdd) optimization, optimization of fin configuration, and low power technique for FinFET domino circuits.
引用
收藏
页码：5783 / 5791
页数：8
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