A Many-Ported and Shared Memory Architecture for High-Performance ADAS SoCs

被引：2
|
作者：
Luan, Hao [1 ]
Yao, Yu [1 ]
Huang, Chang [2 ]
机构：
[1] Horizon Robot, Shanghai 201210, Peoples R China
[2] Horizon Robot, Beijing 100094, Peoples R China
来源：
IEEE DESIGN & TEST | 2022年 / 39卷 / 06期
关键词：
ADAS; heterogeneous; Interconnect; Many Core SoC; Shared Memory;
D O I：
10.1109/MDAT.2022.3202997
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
This article presents a shared memory architecture to enable high data throughput among multiple parallel accesses native to advanced driver assistance system (ADAS) applications. © 2013 IEEE.
引用
收藏
页码：5 / 15
页数：11
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