A 'mesh' seed layer for improved through-silicon-via fabrication

被引：19

作者：

Lai, Jiun-Hong ^{[1
]}

Yang, Hyung Suk ^{[1
]}

Chen, Hang ^{[1
]}

King, Calvin R. ^{[1
]}

Zaveri, Jesal ^{[1
]}

Ravindran, Ramasamy ^{[1
]}

Bakir, Muhannad S. ^{[1
]}

机构：

[1] Georgia Inst Technol, Nanoelect Res Ctr, Atlanta, GA 30332 USA

来源：

JOURNAL OF MICROMECHANICS AND MICROENGINEERING | 2010年 / 20卷 / 02期

关键词：

WAFER INTERCONNECT;

D O I：

10.1088/0960-1317/20/2/025016

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This paper describes an improved method of forming and removing seed layers for through-silicon-vias (TSVs) in applications such as MEMS, sensors and packaging (silicon carrier, for example). A 'mesh seed layer' is proposed to reduce the pinch-off time and facilitate simpler and mechanical-free removal, the latter being possibly important when sensitive MEMS/sensor devices are pre-fabricated on the wafer. As a result, the proposed process may serve as a post-MEMS/sensor method of forming TSVs.

引用

页数：6

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