Bio-inspired 0.35μm CMOS Time-to-Digital Converter with 29.3ps LSB

被引:0
|
作者
Mozsary, Andras [1 ]
Rodriguez-Vazquez, Angel [2 ]
Chung, Jen-Feng [3 ]
Roska, Tamas [1 ]
机构
[1] Peter Pazmany Catholic Univ, Fac Informat Technol, Budapest, Hungary
[2] Anafocus, Seville, Spain
[3] Natl Chiao Tung Univ, Elect & Control Engn Dept, Hsinchu, Taiwan
基金
新加坡国家研究基金会;
关键词
D O I
暂无
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Time-to-Digital Converter (TDC) integrated circuit is introduced in this paper. It is based on chain of delay elements composing a regular scalable structure. The scheme is analogous to the sound direction sensitivity nerve system found in Barn Owl. The circuit occupies small silicon area, and its direct mapping from time to position-code makes conversion rates up to 500Msps possible. Specialty of the circuit is the structural and functional symmetry. Therefore the role of START and STOP signals are interchangeable. In other words negative delay is acceptable: The circuit has no dead time problems. These are benefits of the biology model of the auditory scene representation in the bird's brain. The prototype chip is implemented in 0.35 mu m CMOS having less than 30ps single-shot resolution in the measurements.
引用
收藏
页码:170 / +
页数:2
相关论文
共 50 条
  • [1] An integrated digital CMOS time-to-digital converter with 92 ps LSB
    Mantyniemi, A
    Rahkonen, T
    Kostamovaara, J
    1998 MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS, PROCEEDINGS, 1999, : 180 - 183
  • [2] A 19.5 ps-LSB Vernier-type Time-to-digital Converter for PET
    Kim, Min-Sik
    Cho, Kang-Il
    Kwak, Yong-Sik
    Lee, Sangwon
    Choi, Jaewoo
    Ahn, Gil-Cho
    JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, 2017, 17 (06) : 800 - 805
  • [3] An FPGA based 33-channel, 72 ps LSB time-to-digital converter
    Prasad, K. Hari
    Chandratre, V. B.
    Sukhwani, Menka
    NUCLEAR INSTRUMENTS & METHODS IN PHYSICS RESEARCH SECTION A-ACCELERATORS SPECTROMETERS DETECTORS AND ASSOCIATED EQUIPMENT, 2022, 1027
  • [4] A REVIEW OF CMOS TIME-TO-DIGITAL CONVERTER
    Wang, Zixuan
    Huang, Cheng
    Wu, Jianhui
    JOURNAL OF CIRCUITS SYSTEMS AND COMPUTERS, 2014, 23 (07)
  • [5] A 10ps 500MHz Time-to-Digital Converter in 0.18μm CMOS Technology for ADC
    Li, Yazhou
    Hu, Qingsheng
    PROCEEDINGS OF 2012 2ND INTERNATIONAL CONFERENCE ON COMPUTER SCIENCE AND NETWORK TECHNOLOGY (ICCSNT 2012), 2012, : 234 - 237
  • [6] CMOS time-to-digital converter without delay time
    Choi, JH
    IEICE TRANSACTIONS ON ELECTRONICS, 2002, E85C (05) : 1216 - 1218
  • [7] Synchronization in a Multilevel CMOS Time-to-Digital Converter
    Jansson, Jussi-Pekka
    Mantyniemi, Antti
    Kostamovaara, Juha
    IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2009, 56 (08) : 1622 - 1634
  • [8] 22 μW, 5.1 ps LSB, 5.5 ps RMS jitter Vernier time-to-digital converter in CMOS 65 nm for single photon avalanche diode array
    Nolet, F.
    Roy, N.
    Carrier, S.
    Bouchard, J.
    Fontaine, R.
    Charlebois, S. A.
    Pratte, J. -F.
    ELECTRONICS LETTERS, 2020, 56 (09) : 424 - 425
  • [9] A compact Time-to-Digital Converter (TDC) Module with 10 ps resolution and less than 1.5% LSB DNL
    Markovic, B.
    Villa, F.
    Bellisai, S.
    Bronzi, D.
    Scarcella, C.
    Boso, G.
    Shehata, A. Bahgat
    Della Frera, A.
    Tosi, A.
    2012 IEEE PHOTONICS CONFERENCE (IPC), 2012, : 26 - 27
  • [10] A BiCMOS time-to-digital converter with 30 ps resolution
    Räisänen-Ruotsalainen, E
    Rahkonen, T
    Kostamovaara, J
    ISCAS '99: PROCEEDINGS OF THE 1999 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL 1: VLSI, 1999, : 278 - 281