An approach to high-level synthesis system validation using formally verified transformations

被引：4
|
作者：
Radhakrishnan, R [1 ]
Teica, E [1 ]
Vemuri, R [1 ]
机构：
[1] Univ Cincinnati, Dept ECECS, Cincinnati, OH 45221 USA
来源：
IEEE INTERNATIONAL HIGH-LEVEL DESIGN VALIDATION AND TEST WORKSHOP, PROCEEDINGS | 2000年
关键词：
D O I：
10.1109/HLDVT.2000.889564
中图分类号：
TP301 [理论、方法];
学科分类号：
081202 ;
摘要：
Complexity of advanced high-level synthesis algorithms call be attributed to design quality concerns. However, this complexity may lead to software are errors in their implementations which ma?, adversely impact design correctness. Transformational synthesis is a synthesis methodology where localized, behavior-presenting register transfer level (RTL) transformations are used to obtain a correct and constraint satisfying RTL design. This paper presents the novel we of a set of such transformations ill validating an existing non-transformational synthesis system by discovering and to some extent isolating software errors.
引用
收藏
页码：80 / 85
页数：6
相关论文
共 50 条
  • [21] A TRANSFORMATIONAL APPROACH TO ASYNCHRONOUS HIGH-LEVEL SYNTHESIS
    GOPALAKRISHNAN, G
    AKELLA, V
    VLSI 93, 1994, 42 : 201 - 210
  • [22] FIDIAS - AN INTEGRAL APPROACH TO HIGH-LEVEL SYNTHESIS
    SEPTIEN, J
    MOZOS, D
    TIRADO, JF
    HERMIDA, R
    FERNANDEZ, M
    MECHA, H
    IEE PROCEEDINGS-CIRCUITS DEVICES AND SYSTEMS, 1995, 142 (04): : 227 - 235
  • [23] High-Level Dataflow Transformations Using Taylor Expansion Diagrams
    Ciesielski, Maciej
    Gomez-Prado, Daniel
    Guillot, Jeremie
    Boutillon, Emmanuel
    IEEE DESIGN & TEST OF COMPUTERS, 2009, 26 (04): : 46 - 57
  • [24] Symbolic Execution of High-Level Transformations
    Al-Sibahi, Ahmad Salim
    Dimovski, Aleksandar S.
    Wasowski, Andrzej
    PROCEEDINGS OF THE 2016 ACM SIGPLAN INTERNATIONAL CONFERENCE ON SOFTWARE LANGUAGE ENGINEERING (SLE'16), 2016, : 207 - 220
  • [25] DSS - A DISTRIBUTED HIGH-LEVEL SYNTHESIS SYSTEM
    ROY, J
    KUMAR, N
    DUTTA, R
    VEMURI, R
    IEEE DESIGN & TEST OF COMPUTERS, 1992, 9 (02): : 18 - 32
  • [26] DESIGN CONTROL IN A HIGH-LEVEL SYNTHESIS SYSTEM
    MOZOS, D
    SEPTIEN, J
    TIRADO, F
    HERMIDA, R
    MICROPROCESSING AND MICROPROGRAMMING, 1992, 34 (1-5): : 93 - 96
  • [27] High-level synthesis algorithm based on area oriented design transformations
    Schenk, W.
    International Conference on Superconductivity, 1990,
  • [28] Leveraging Emerging Nonvolatile Memory in High-Level Synthesis with Loop Transformations
    Li, Shuangchen
    Li, Ang
    Zhe, Yuan
    Liu, Yongpan
    Li, Peng
    Sun, Guangyu
    Wang, Yu
    Yang, Huazhong
    Xie, Yuan
    2015 IEEE/ACM INTERNATIONAL SYMPOSIUM ON LOW POWER ELECTRONICS AND DESIGN (ISLPED), 2015, : 61 - 66
  • [29] SPARK: A high-level synthesis framework for applying parallelizing compiler transformations
    Gupta, S
    Dutt, N
    Gupta, R
    Nicolau, A
    16TH INTERNATIONAL CONFERENCE ON VLSI DESIGN, PROCEEDINGS, 2003, : 461 - 466
  • [30] Optimizing Memory Hierarchy Allocation with Loop Transformations for High-Level Synthesis
    Cong, Jason
    Zhang, Peng
    Zou, Yi
    2012 49TH ACM/EDAC/IEEE DESIGN AUTOMATION CONFERENCE (DAC), 2012, : 1229 - 1234
12345