Runtime leakage power estimation technique for combinational circuits

被引：0

作者：

Lin, Yu-Shiang ^{[1
]}

Sylvester, Dennis ^{[1
]}

机构：

[1] Univ Michigan, EECS, 1301 Beal Ave, Ann Arbor, MI 48109 USA

来源：

PROCEEDINGS OF THE ASP-DAC 2007 | 2007年

关键词：

D O I：

暂无

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

This paper carefully examines subthreshold leakage during circuit operation (runtime) and develops a novel analysis technique to capture this important effect, which is currently ignored in traditional steady-state leakage calculation approaches. We implement novel dynamic and static estimation methods that provide significant speed improvements over full SPICE simulations and yield estimation errors of approximately 12% on average compared to more than 2X errors in steady-state based subthreshold leakage analysis.

引用

页码：660 / +

页数：2

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