Additive bit-serial algorithm for discrete algorithm modulo 2k

被引：3
|
作者：
Fit-Florea, A [1 ]
Matula, DW [1 ]
Thornton, MA [1 ]
机构：
[1] So Methodist Univ, Dallas, TX 75275 USA
来源：
ELECTRONICS LETTERS | 2005年 / 41卷 / 02期
关键词：
D O I：
10.1049/el:20056993
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
A novel algorithm for computing the discrete logarithm modulo 2(k) that is suitable for fast software or hardware implementation is described. The chosen preferred implementation is based on a linear-time multiplier-less method and has a critical path of less than k modulo 2(k) shift-and-add operations.
引用
收藏
页码：57 / 59
页数：3
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