共 50 条
- [2] Efficient bit-serial systolic array for division over GF(2m) PROCEEDINGS OF THE 2003 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL II: COMMUNICATIONS-MULTIMEDIA SYSTEMS & APPLICATIONS, 2003, : 252 - 255
- [3] A new reconfigurable bit-serial systolic divider for GF(2M) and GF(P). 2005 IEEE INTERNATIONAL CONFERENCE ON ACOUSTICS, SPEECH, AND SIGNAL PROCESSING, VOLS 1-5: SPEECH PROCESSING, 2005, : 105 - 108
- [5] A new word-parallel bit-serial normal basis multiplier over GF(2m) International Journal of Control and Automation, 2013, 6 (03): : 209 - 216
- [7] Efficient Bit-Serial Finite Field Montgomery Multiplier in GF(2m) 2014 4TH IEEE INTERNATIONAL CONFERENCE ON INFORMATION SCIENCE AND TECHNOLOGY (ICIST), 2014, : 527 - 530
- [8] Bit-serial AOP arithmetic architectures over GF(2m) INFRASTRUCTURE SECURITY, PROCEEDINGS, 2002, 2437 : 303 - 313
- [9] A Versatile Reconfigurable Bit-Serial Multiplier Architecture in Finite Fields GF(2m) ADVANCES IN COMPUTER SCIENCE AND ENGINEERING, 2008, 6 : 227 - 234
- [10] Low Complexity LFSR Based Bit-Serial Montgomery Multiplier in GF(2m) 2013 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), 2013, : 1962 - 1965