Flip-Flop Upsets From Single-Event-Transients in 65 nm Clock Circuits

被引：12
|
作者：
Wissel, Larry [1 ]
Heidel, David F. [2 ]
Gordon, Michael S. [2 ]
Rodbell, Kenneth P. [2 ]
Stawiasz, Kevin [2 ]
Cannon, Ethan H. [1 ]
机构：
[1] IBM Corp, Syst & Technol Grp, Essex Jct, VT 05452 USA
[2] IBM Corp, TJ Watson Res Lab, Yorktown Hts, NY 10598 USA
来源：
IEEE TRANSACTIONS ON NUCLEAR SCIENCE | 2009年 / 56卷 / 06期
关键词：
Flip-flop; single-event transient; soft error;
D O I：
10.1109/TNS.2009.2033997
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
This paper describes upsets of 65 nm flip-flops caused by Single-Event-Transients in clock-tree circuits. The upset rate is predicted through modeling, and compared to upset rates measured on a 65 nm test chip with 15 MeV carbon ions and 148 MeV protons.
引用
收藏
页码：3145 / 3151
页数：7
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