FPGA-based experimentation for tmr structure and evolutionary approach of self-recovering

被引：0
|
作者：
Yuan Liang
Huang Feiyun
Liu Wenbing
Liu Wenjie
机构：
来源：
PROCEEDINGS OF THE FIRST INTERNATIONAL CONFERENCE ON MAINTENANCE ENGINEERING | 2006年
关键词：
TMR; EHW; FPGA; fault tolerance;
D O I：
暂无
中图分类号：
T [工业技术];
学科分类号：
08 ;
摘要：
According to the basic principle of TMR (Three module redundancy) and EHW, (Evolvable Hardware) technique, the paper discussed in the detail about a fault-tolerance and self-recovery system with FPGA chips and VHDL language. Then, an experiment environment was designed and created, which could be used for further study of some tangible evolution work and function testing systems. Based on this, an improved TMR structure was finished as an example. So, if there comes an abnormal result in the output of any I of the 3 modules, it will be corrected immediately, and if there are constant malfunctions in a module, it could be bypassed, and a self-recovery process for the corresponding circuit could then be launched. Then, a new circuit that can be used for the replacement will be designed by evolutionary algorithms, and downloaded to the under-testing controller automatically to replace the damaged circuit. The experiment shows that this TMR-EHW approach increased the reliability of the system when it is exposed to EMI.
引用
收藏
页码：172 / 179
页数：8
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