Runtime Self-Attestation of FPGA-Based IoT Devices

Flexibility and reconfigurability make field-programmable gate arrays (FPGAs) ideal for IoT applications because they enable efficient customization and optimization of hardware acceleration tasks in diverse IoT applications. Malicious hardware trojans pose a significant security threat, capable of compromising the integrity of reconfigurable devices such as FPGAs. The majority of current attestation schemes either demonstrate complexity and demand significant resources or lack versatility. To solve this issue, this article proposes a novel lightweight runtime attestation approach to detect hardware trojans or malicious modifications in a hardware design. The proposed technique can verify the integrity of both the hardware design's finite state machine (FSM) and its datapath. Attesting the FSM ensures the accuracy of state transitions and control behavior while verifying the datapath validates the data processing operations. When combined, these provide a comprehensive validation of the overall hardware functionality. A trusted verifier initiates challenges by stipulating a starting state and an input sequence to the prover. The prover then executes these challenges and reports the observed responses, i.e., state transitions, control outputs, status outputs, and timing metrics. Anomalies between the expected and observed behaviors serve as indicators of potential trojan interventions. The proposed method's efficacy is substantiated through simulation and implementation on a Zynq-7000 SoC, showcasing its efficiency in terms of resource utilization overhead. Collectively, this study advances the capabilities of remote attestation while bolstering the security of reconfigurable platforms.