Analysis of the effects of strain in ultra-thin SOI MOS devices

被引：0
|
作者：
Barin, Nicola [1 ]
Fiegna, Claudio [1 ]
Sangiorgi, Enrico [1 ]
机构：
[1] Univ Ferrara, ENDIF, Via Saragat 1, I-44100 Ferrara, Italy
来源：
FRONTIERS IN ELECTRONICS | 2006年 / 41卷
关键词：
MOSFET; SOI; quantum; double gate; strain; tunneling;
D O I：
10.1142/9789812773081_0007
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
Ultra-thin body Double Gate MOS structures with strained silicon are investigated by solving the ID Schrodinger and Poisson equations, with open boundaries conditions on the wave functions in the gate electrodes. The electrostatics of this device architecture and its dependence on the amount of strain and on the thickness of the silicon layer is analyzed in terms of subband structure, subband population, carrier distribution within the strained-silicon layer, charge-voltage characteristics and gate tunneling current.
引用
收藏
页码：105 / +
页数：3
相关论文
共 50 条
  • [21] ANALYSIS OF DRAIN BREAKDOWN AND EVALUATION OF OPERATION SPEED IN ULTRA-THIN SOI MOSFETS
    YOSHIMI, M
    TAKAHASHI, M
    KAMBAYASHI, S
    KEMMOCHI, M
    WADA, T
    NATORI, K
    1989 SYMPOSIUM ON VLSI TECHNOLOGY: DIGEST OF TECHNICAL PAPERS, 1989, : 15 - 16
  • [22] Effect of strain-temperature stress on MOS structure with ultra-thin gate oxide
    Lin, Chia-Nan
    Yang, Yi-Lin
    Chen, Wei-Ting
    Lin, Shang-Chih
    Chuang, Kai-Chieh
    Hwu, Jenn-Gwo
    MICROELECTRONIC ENGINEERING, 2008, 85 (09) : 1915 - 1919
  • [23] Mobility issues in ultra-thin SOI MOSFETs:: Thickness variations, GIFBE and coupling effects
    Ohata, A
    Cassé, ML
    Cristoloveanu, S
    Poiroux, T
    ESSDERC 2004: PROCEEDINGS OF THE 34TH EUROPEAN SOLID-STATE DEVICE RESEARCH CONFERENCE, 2004, : 109 - 112
  • [24] A novel ultra-thin vapor chamber for heat dissipation in ultra-thin portable electronic devices
    Huang, Guangwen
    Liu, Wangyu
    Luo, Yuanqiang
    Li, Yong
    APPLIED THERMAL ENGINEERING, 2020, 167 (167)
  • [25] Electrostatic Discharge Effects in Fully Depleted SOI MOSFETs with Ultra-Thin Gate Oxide and Different Strain-Inducing Techniques
    Griffoni, Alessio
    Tazzoli, Augusto
    Gerardin, Simone
    Simoen, Eddy
    Claeys, Cor
    Meneghesso, Gaudenzio
    ELECTRICAL OVERSTRESS/ELECTROSTATIC DISCHARGE SYMPOSIUM PROCEEDINGS - 2008, 2008, : 59 - +
  • [26] ULTRA-THIN SEMICONDUCTOR QUANTUM WELLS - POTENTIAL SHAPES AND STRAIN EFFECTS
    PRIESTER, C
    ALLAN, G
    LANNOO, M
    JOURNAL DE PHYSIQUE, 1987, 48 (C-5): : 203 - 206
  • [27] Statistical analysis of quantized inversion layer in MOS devices with ultra-thin gate oxide and high substrate doping levels
    Ma, YT
    Liu, LT
    Tian, LL
    Li, ZJ
    2000 IEEE HONG KONG ELECTRON DEVICES MEETING, PROCEEDINGS, 2000, : 126 - 129
  • [28] Parasitic bipolar effect in ultra-thin FD SOI MOSFETs
    Liu, F. Y.
    Ionica, I.
    Bawedin, M.
    Cristoloveanu, S.
    SOLID-STATE ELECTRONICS, 2015, 112 : 29 - 36
  • [29] Electron transport in silicon nanostructures based on ultra-thin SOI
    Pouydebasque, A
    Montes, L
    Zimmermann, J
    Balestra, F
    Fraboulet, D
    Mariolle, D
    Gautier, J
    Schopfer, F
    Bouchiat, V
    Saminadayar, L
    JOURNAL DE PHYSIQUE IV, 2002, 12 (PR3): : 97 - 101
  • [30] Examination of hole mobility in ultra-thin body SOI MOSFETs
    Ren, ZB
    Solomon, PM
    Kanarsky, T
    Doris, B
    Dokumaci, O
    Oldiges, P
    Roy, RA
    Jones, EC
    Ieong, M
    Miller, RJ
    Haensch, W
    Wong, HSP
    INTERNATIONAL ELECTRON DEVICES 2002 MEETING, TECHNICAL DIGEST, 2002, : 51 - 54
12345